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author | Florian Fainelli <florian@openwrt.org> | 2012-07-04 16:57:09 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-23 13:54:32 +0100 |
commit | d9831a41e3409ae60e0cac353272d8ae4996b442 (patch) | |
tree | 9b0d8607984f49e6999f56423ea907dfd03fd084 /arch/mips/bcm63xx | |
parent | 28a33cbc24e4256c143dce96c7d93bf423229f92 (diff) | |
download | linux-exynos-d9831a41e3409ae60e0cac353272d8ae4996b442.tar.gz linux-exynos-d9831a41e3409ae60e0cac353272d8ae4996b442.tar.bz2 linux-exynos-d9831a41e3409ae60e0cac353272d8ae4996b442.zip |
MIPS: BCM63XX: Be consistent in clock bits enable naming
Remove the _CLK suffix from the BCM6368 clock bits definitions to be
consistent with what is already present.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3312/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r-- | arch/mips/bcm63xx/clk.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 9d57c71b7b58..8d2ea223f102 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -120,7 +120,7 @@ static void enetsw_set(struct clk *clk, int enable) { if (!BCMCPU_IS_6368()) return; - bcm_hwclock_set(CKCTL_6368_ROBOSW_CLK_EN | + bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | CKCTL_6368_SWPKT_USB_EN | CKCTL_6368_SWPKT_SAR_EN, enable); if (enable) { @@ -163,7 +163,7 @@ static void usbh_set(struct clk *clk, int enable) if (BCMCPU_IS_6348()) bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); else if (BCMCPU_IS_6368()) - bcm_hwclock_set(CKCTL_6368_USBH_CLK_EN, enable); + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); } static struct clk clk_usbh = { @@ -199,7 +199,7 @@ static void xtm_set(struct clk *clk, int enable) if (!BCMCPU_IS_6368()) return; - bcm_hwclock_set(CKCTL_6368_SAR_CLK_EN | + bcm_hwclock_set(CKCTL_6368_SAR_EN | CKCTL_6368_SWPKT_SAR_EN, enable); if (enable) { |