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author | Jonas Gorski <jonas.gorski@gmail.com> | 2012-07-24 16:33:11 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-24 16:33:11 +0200 |
commit | aaf3fedb56c95b419eda4c5392e03ad9b82c4847 (patch) | |
tree | 85a25757c0b049af11e7306cb72c9989e81c0c98 /arch/mips/bcm63xx | |
parent | 4b897d5483da5c3f3c4d52440a994aad574b62b4 (diff) | |
download | linux-exynos-aaf3fedb56c95b419eda4c5392e03ad9b82c4847.tar.gz linux-exynos-aaf3fedb56c95b419eda4c5392e03ad9b82c4847.tar.bz2 linux-exynos-aaf3fedb56c95b419eda4c5392e03ad9b82c4847.zip |
MIPS: BCM63XX: Add flash type detection
On BCM6358 and BCM6368 the attached flash type is exposed through a
bootstrapping register. Use it for auto detecting the flash type on
those and default to parallel flash for earlier SoCs.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3954/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r-- | arch/mips/bcm63xx/dev-flash.c | 60 |
1 files changed, 54 insertions, 6 deletions
diff --git a/arch/mips/bcm63xx/dev-flash.c b/arch/mips/bcm63xx/dev-flash.c index af5273868baa..1051faedab2d 100644 --- a/arch/mips/bcm63xx/dev-flash.c +++ b/arch/mips/bcm63xx/dev-flash.c @@ -7,6 +7,7 @@ * * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> + * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com> */ #include <linux/init.h> @@ -54,16 +55,63 @@ static struct platform_device mtd_dev = { }, }; +static int __init bcm63xx_detect_flash_type(void) +{ + u32 val; + + switch (bcm63xx_get_cpu_id()) { + case BCM6338_CPU_ID: + case BCM6345_CPU_ID: + case BCM6348_CPU_ID: + /* no way to auto detect so assume parallel */ + return BCM63XX_FLASH_TYPE_PARALLEL; + case BCM6358_CPU_ID: + val = bcm_gpio_readl(GPIO_STRAPBUS_REG); + if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL) + return BCM63XX_FLASH_TYPE_PARALLEL; + else + return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6368_CPU_ID: + val = bcm_gpio_readl(GPIO_STRAPBUS_REG); + switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { + case STRAPBUS_6368_BOOT_SEL_NAND: + return BCM63XX_FLASH_TYPE_NAND; + case STRAPBUS_6368_BOOT_SEL_SERIAL: + return BCM63XX_FLASH_TYPE_SERIAL; + case STRAPBUS_6368_BOOT_SEL_PARALLEL: + return BCM63XX_FLASH_TYPE_PARALLEL; + } + default: + return -EINVAL; + } +} + int __init bcm63xx_flash_register(void) { + int flash_type; u32 val; - /* read base address of boot chip select (0) */ - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; + flash_type = bcm63xx_detect_flash_type(); - mtd_resources[0].start = val; - mtd_resources[0].end = 0x1FFFFFFF; + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: + /* read base address of boot chip select (0) */ + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; - return platform_device_register(&mtd_dev); + mtd_resources[0].start = val; + mtd_resources[0].end = 0x1FFFFFFF; + + return platform_device_register(&mtd_dev); + case BCM63XX_FLASH_TYPE_SERIAL: + pr_warn("unsupported serial flash detected\n"); + return -ENODEV; + case BCM63XX_FLASH_TYPE_NAND: + pr_warn("unsupported NAND flash detected\n"); + return -ENODEV; + default: + pr_err("flash detection failed for BCM%x: %d\n", + bcm63xx_get_cpu_id(), flash_type); + return -ENODEV; + } } |