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authorMichal Simek <monstr@monstr.eu>2012-07-31 11:30:57 +0200
committerMichal Simek <monstr@monstr.eu>2012-10-04 14:47:01 +0200
commit9f78d3b5ab97a22a7e836312c495804ee4bca4ab (patch)
tree2f4173792ef4b0eda7283de4a604dd002bb60122 /arch/microblaze/include
parent88d23b4462c9c9b8c8876d60f5b57d39b53c6227 (diff)
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microblaze: Do not used hardcoded value in exception handler
Use predefined macros to support more page sizes. Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r--arch/microblaze/include/asm/page.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 287c5485d286..dd9ea9d6b765 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -37,6 +37,8 @@
#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_KERNEL_BASE_ADDR))
+#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
+
#ifndef __ASSEMBLY__
/* MS be sure that SLAB allocates aligned objects */
@@ -71,7 +73,6 @@ extern unsigned int __page_offset;
* The basic type of a PTE - 32 bit physical addressing.
*/
typedef unsigned long pte_basic_t;
-#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
#define PTE_FMT "%.8lx"
#endif /* CONFIG_MMU */