diff options
author | Marc Zyngier <marc.zyngier@arm.com> | 2018-12-18 14:59:09 +0000 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-01-09 17:14:52 +0100 |
commit | 83c2752a5602f68ffbb21ea25a72ec23a0a260ba (patch) | |
tree | 7920fa07701aace39c647ad049d4c27e04304fa1 | |
parent | f6be406e60c57692df4d5c6d082de1f08a3dac73 (diff) | |
download | linux-exynos-83c2752a5602f68ffbb21ea25a72ec23a0a260ba.tar.gz linux-exynos-83c2752a5602f68ffbb21ea25a72ec23a0a260ba.tar.bz2 linux-exynos-83c2752a5602f68ffbb21ea25a72ec23a0a260ba.zip |
arm/arm64: KVM: vgic: Force VM halt when changing the active state of GICv3 PPIs/SGIs
commit 107352a24900fb458152b92a4e72fbdc83fd5510 upstream.
We currently only halt the guest when a vCPU messes with the active
state of an SPI. This is perfectly fine for GICv2, but isn't enough
for GICv3, where all vCPUs can access the state of any other vCPU.
Let's broaden the condition to include any GICv3 interrupt that
has an active state (i.e. all but LPIs).
Cc: stable@vger.kernel.org
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | virt/kvm/arm/vgic/vgic-mmio.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c index b4c5baf4af45..36194c666814 100644 --- a/virt/kvm/arm/vgic/vgic-mmio.c +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -241,14 +241,16 @@ static void vgic_mmio_change_active(struct kvm_vcpu *vcpu, struct vgic_irq *irq, */ static void vgic_change_active_prepare(struct kvm_vcpu *vcpu, u32 intid) { - if (intid > VGIC_NR_PRIVATE_IRQS) + if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 || + intid > VGIC_NR_PRIVATE_IRQS) kvm_arm_halt_guest(vcpu->kvm); } /* See vgic_change_active_prepare */ static void vgic_change_active_finish(struct kvm_vcpu *vcpu, u32 intid) { - if (intid > VGIC_NR_PRIVATE_IRQS) + if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 || + intid > VGIC_NR_PRIVATE_IRQS) kvm_arm_resume_guest(vcpu->kvm); } |