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authorMarek Szyprowski <m.szyprowski@samsung.com>2018-05-30 12:44:25 +0200
committerInki Dae <inki.dae@samsung.com>2018-05-31 00:57:18 +0000
commit5231d80f81b57538144bfa5104bb7d3679353a79 (patch)
tree44a721467ef6e2db3090d7adec77571a5c1093c3
parent0428cf1c4f615b231b33b2b90b232ce6943c5baf (diff)
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drm/exynos: decon5433: Fix per-plane global alpha for XRGB modes
Set per-plane global alpha to maximum value to get proper blending of XRGB together with ARGB planes. This fixes the strange order of overlapping planes, especially when XRGB planes are displayed together with ARGB planes. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Change-Id: I64d98f00b72047fe4b22b6d1b49e4222303be134
-rw-r--r--drivers/gpu/drm/exynos/exynos5433_drm_decon.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index d34b14b22e00..b3fccb04689a 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -381,8 +381,8 @@ static void decon_win_commit(struct exynos_drm_crtc *crtc, unsigned int win)
writel(val, ctx->addr + DECON_VIDOSDxB(win));
}
- val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |
- VIDOSD_Wx_ALPHA_B_F(0x0);
+ val = VIDOSD_Wx_ALPHA_R_F(0xff) | VIDOSD_Wx_ALPHA_G_F(0xff) |
+ VIDOSD_Wx_ALPHA_B_F(0xff);
writel(val, ctx->addr + DECON_VIDOSDxC(win));
val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |