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path: root/drivers/gpu/drm/i915/i915_irq.c
AgeCommit message (Expand)AuthorFilesLines
2011-08-15drm/i915: Can't do accurate vblank timestamps with UMSKeith Packard1-2/+4
2011-07-28Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard1-2/+2
2011-07-28drm/i915: Fixup for 'Hold mode_config->mutex during hotplug'Keith Packard1-2/+2
2011-07-25Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard1-0/+3
2011-07-25drm/i915: Hold mode_config->mutex during hotplug processingKeith Packard1-0/+3
2011-07-01Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard1-1/+1
2011-07-01drm/i915: apply HWSTAM writes to Ivy Bridge as wellJesse Barnes1-1/+1
2011-06-29Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard1-20/+58
2011-06-29drm/i915: move IRQ function table init to i915_irq.cJesse Barnes1-20/+58
2011-06-29drm/i915: hangcheck disable parameterBen Widawsky1-4/+9
2011-06-21drm/i915: Apply HWSTAM workaround for BSD ring on SandyBridgeChris Wilson1-0/+1
2011-06-18drm/i915: Fix gen6 (SNB) missed BLT ring interrupts.Daniel J Blueman1-0/+10
2011-06-04drm/i915: fix if statement in ivybridge irq handlerDan Carpenter1-1/+1
2011-05-18drm/i915: initialize gen6 rps work queue on Sandy Bridge and Ivy BridgeJesse Barnes1-1/+2
2011-05-13drm/i915: interrupt & vblank support for Ivy BridgeJesse Barnes1-0/+165
2011-05-13drm/i915: split enable/disable vblank code into chipset specific functionsJesse Barnes1-11/+31
2011-05-13drm/i915: split irq handling into per-chipset functionsJesse Barnes1-20/+25
2011-05-10drm/i915: move gen6 rps handling to workqueueBen Widawsky1-8/+41
2011-05-10drm/i915: reference counted forcewakeBen Widawsky1-1/+0
2011-05-10drm/i915: Rename agp_type to cache_levelChris Wilson1-1/+1
2011-05-10drm/i915: Move the irq wait queue initialisation into the ring initChris Wilson1-6/+0
2011-03-01drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#"Chris Wilson1-0/+9
2011-03-01Revert "drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPU"Chris Wilson1-33/+0
2011-03-01drm/i915: Silence an innocuous compiler warning for an unused variableChris Wilson1-1/+0
2011-02-16Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-7/+11
2011-02-16drm/i915: don't enable FDI & transcoder interrupts after allJesse Barnes1-3/+3
2011-02-07drm/i915: cleanup per-pipe reg usageJesse Barnes1-83/+66
2011-02-07drm/i915: Refine tracepointsChris Wilson1-11/+1
2011-02-07drm/i915: Include 'i915_error_state' hint for when the GPU catches fireChris Wilson1-1/+2
2011-02-01Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-4/+4
2011-01-31drm/i915: Suppress spurious vblank interruptsChris Wilson1-4/+4
2011-01-28drm/i915: Record all error ringbuffersChris Wilson1-8/+14
2011-01-24Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-10/+27
2011-01-24drm/i915: Prevent uninitialised reads during error state captureChris Wilson1-0/+2
2011-01-24drm/i915: Handle the no-interrupts case for UMS by pollingChris Wilson1-2/+2
2011-01-24drm/i915: Increase the amount of defense before computing vblank timestampsChris Wilson1-7/+18
2011-01-23drm/i915: Remove unused code: i915_enable_interrupt()Chris Wilson1-10/+0
2011-01-20drm/i915: Don't kick-off hangcheck after a DRI interruptChris Wilson1-1/+5
2011-01-19drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPUChris Wilson1-0/+33
2011-01-13drm/i915: Fix error handler to capture the first batch after the seqnoChris Wilson1-1/+1
2011-01-11drm/i915: Record AGP memory type upon errorChris Wilson1-0/+1
2011-01-11drm/i915: Record the error batchbuffer on each ringChris Wilson1-118/+46
2011-01-11drm/i915: detect & report PCH display error interruptsJesse Barnes1-2/+52
2011-01-11drm/i915/debugfs: Show the per-ring IMRChris Wilson1-1/+4
2011-01-11drm/i915: Mask USER interrupts on gen6 (until required)Chris Wilson1-45/+0
2010-12-18drm/i915: dynamic render p-state support for Sandy BridgeJesse Barnes1-2/+45
2010-12-16drm/i915: Add support for precise vblank timestamping (v2)Mario Kleiner1-0/+86
2010-12-15Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake"Chris Wilson1-1/+2
2010-12-14drm/i915/ringbuffer: Make IRQ refcnting atomicChris Wilson1-8/+9
2010-12-05drm/i915: Avoid using PIPE_CONTROL on IronlakeChris Wilson1-2/+2