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path: root/drivers/clk/spear
AgeCommit message (Expand)AuthorFilesLines
2012-07-18Clk: SPEAr1340: Update sys clock parent arrayVipul Kumar Samar1-2/+2
2012-07-18clk: SPEAr1340: Fix clk enable register for uart1 and i2c1.Vipul Kumar Samar1-2/+2
2012-07-18Clk:spear6xx:Fix: Rename clk ids within predefined limitVipul Kumar Samar1-62/+60
2012-07-18Clk:spear3xx:Fix: Rename clk ids within predefined limitVipul Kumar Samar1-94/+86
2012-07-18clk:spear1310:Fix: Rename clk ids within predefined limitVipul Kumar Samar1-157/+155
2012-07-18clk:spear1340:Fix: Rename clk ids within predefined limitVipul Kumar Samar1-138/+135
2012-06-25clk: SPEAr600: Fix ethernet clock name for DT based probingStefan Roese1-1/+1
2012-06-20Viresh has movedViresh Kumar10-10/+10
2012-05-14SPEAr13xx: Add common clock framework supportViresh Kumar3-0/+2072
2012-05-12SPEAr: Switch to common clock frameworkViresh Kumar3-0/+957
2012-05-12SPEAr: clk: Add General Purpose Timer Synthesizer clockViresh Kumar3-1/+172
2012-05-12SPEAr: clk: Add Fractional Synthesizer clockViresh Kumar3-1/+182
2012-05-12SPEAr: clk: Add Auxiliary Synthesizer clockViresh Kumar3-1/+242
2012-05-12SPEAr: clk: Add VCO-PLL Synthesizer clockViresh Kumar4-0/+462