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| author | Clemens Ladisch <clemens@ladisch.de> | 2007-09-17 09:39:51 +0200 |
|---|---|---|
| committer | Jaroslav Kysela <perex@perex.cz> | 2007-10-16 16:50:33 +0200 |
| commit | 8ffbc01e2cb2e203df910468f236c7b4e7b36f25 (patch) | |
| tree | 0a81b87cd1118460cfb0a6d0d4e172ba44d41e58 /sound | |
| parent | 35add1c295c634fdbb1072189286e4eab3fd64fa (diff) | |
| download | linux-3.10-8ffbc01e2cb2e203df910468f236c7b4e7b36f25.tar.gz linux-3.10-8ffbc01e2cb2e203df910468f236c7b4e7b36f25.tar.bz2 linux-3.10-8ffbc01e2cb2e203df910468f236c7b4e7b36f25.zip | |
[ALSA] cmipci: reorganize set_dac_channels()
By reorganizing the code that sets the CHB3DxC bits we can not only
simplify this code but also fix the bug where the CHB3D8C bit was not
reset when playing a stereo stream after a 7.1 stream.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/pci/cmipci.c | 49 |
1 files changed, 19 insertions, 30 deletions
diff --git a/sound/pci/cmipci.c b/sound/pci/cmipci.c index c51ea0ef26f..b4f74ae9c0b 100644 --- a/sound/pci/cmipci.c +++ b/sound/pci/cmipci.c @@ -738,48 +738,37 @@ static struct snd_pcm_hw_constraint_list hw_constraints_channels_8 = { static int set_dac_channels(struct cmipci *cm, struct cmipci_pcm *rec, int channels) { if (channels > 2) { - if (! cm->can_multi_ch) + if (!cm->can_multi_ch || !rec->ch) return -EINVAL; if (rec->fmt != 0x03) /* stereo 16bit only */ return -EINVAL; + } + if (cm->can_multi_ch) { spin_lock_irq(&cm->reg_lock); - snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG); - snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); - if (channels > 4) { - snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); - snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C); + if (channels > 2) { + snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG); + snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); } else { - snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C); - snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); + snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG); + snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); } - if (channels >= 6) { + if (channels == 8) + snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C); + else + snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C); + if (channels == 6) { + snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C); snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C); - snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER); } else { - snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C); - snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER); - } - if (cm->chip_version == 68) { - if (channels == 8) { - snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C); - } else { - snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C); - } - } - spin_unlock_irq(&cm->reg_lock); - - } else { - if (cm->can_multi_ch) { - spin_lock_irq(&cm->reg_lock); - snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG); - snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C); snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C); - snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER); - snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); - spin_unlock_irq(&cm->reg_lock); } + if (channels == 4) + snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); + else + snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); + spin_unlock_irq(&cm->reg_lock); } return 0; } |