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authorFlorian Fainelli <florian@openwrt.org>2012-11-12 08:48:45 +0000
committerJohn Crispin <blogic@openwrt.org>2012-11-20 08:30:50 +0100
commite59b008e14c63572d4c643592e84bbd1b4088f39 (patch)
treeb69661b59829de3b4e69ad43858000cab5ef9fab /init
parent0224cde212df4abf251f89c3724a800b1949a774 (diff)
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MIPS: BCM63XX: fix BCM6345 clocks bits
BCM6345 has an intermediate 16-bits wide test control register between the peripheral identifier register, and its clock control register is only 16-bits wide contrary to other platforms where it is 32-bits wide. By shifting all clocks bits by 16-bits to the left we ensure they get written to the proper clock control register, without adding specific BCM6345 handling in the clock code. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4555/ Signed-off-by: John Crispin <blogic@openwrt.org>
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