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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 14:05:52 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 14:05:52 +0900
commitfdfc74f9fcebdda14609159d5010b758a9409acf (patch)
tree191532cb703383768cc198a41503e412578921bb /include
parent36efc35447154317f9ffc5163a1793b5f7ff3de1 (diff)
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sh: Support for SH-4A memory barriers.
SH-4A supports 'synco' as a barrier, sprinkle it around the cache ops as necessary.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/system.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index e89728d405d..eb4902ed920 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -84,10 +84,17 @@ static __inline__ unsigned long tas(volatile int *m)
extern void __xchg_called_with_bad_pointer(void);
+#ifdef CONFIG_CPU_SH4A
+#define mb() __asm__ __volatile__ ("synco": : :"memory")
+#define rmb() mb()
+#define wmb() __asm__ __volatile__ ("synco": : :"memory")
+#define read_barrier_depends() do { } while(0)
+#else
#define mb() __asm__ __volatile__ ("": : :"memory")
#define rmb() mb()
#define wmb() __asm__ __volatile__ ("": : :"memory")
#define read_barrier_depends() do { } while(0)
+#endif
#ifdef CONFIG_SMP
#define smp_mb() mb()