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author | Kevin Hao <haokexin@gmail.com> | 2014-07-12 12:08:24 +0800 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-07-31 12:53:48 -0700 |
commit | 97a230703c9f6cbed3bdd4d4a627863c14a8a2de (patch) | |
tree | 5b3d8691096f8eb0188cab254fb6c6665cc2e51d /include | |
parent | cb454b6d31756674d2e0ceaa336ec87019728d9b (diff) | |
download | linux-3.10-97a230703c9f6cbed3bdd4d4a627863c14a8a2de.tar.gz linux-3.10-97a230703c9f6cbed3bdd4d4a627863c14a8a2de.tar.bz2 linux-3.10-97a230703c9f6cbed3bdd4d4a627863c14a8a2de.zip |
libata: support the ata host which implements a queue depth less than 32
commit 1871ee134b73fb4cadab75752a7152ed2813c751 upstream.
The sata on fsl mpc8315e is broken after the commit 8a4aeec8d2d6
("libata/ahci: accommodate tag ordered controllers"). The reason is
that the ata controller on this SoC only implement a queue depth of
16. When issuing the commands in tag order, all the commands in tag
16 ~ 31 are mapped to tag 0 unconditionally and then causes the sata
malfunction. It makes no senses to use a 32 queue in software while
the hardware has less queue depth. So consider the queue depth
implemented by the hardware when requesting a command tag.
Fixes: 8a4aeec8d2d6 ("libata/ahci: accommodate tag ordered controllers")
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions