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| author | Simon Guinot <sguinot@lacie.com> | 2011-07-06 12:41:31 -0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-07 16:02:26 +0000 |
| commit | 659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5 (patch) | |
| tree | a875904f1c457f321563060491956266a57c6514 /include/linux | |
| parent | d30e1521b2afb5e6f21ca8bc1a4b6ec2afc93597 (diff) | |
| download | linux-3.10-659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5.tar.gz linux-3.10-659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5.tar.bz2 linux-3.10-659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5.zip | |
genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)
This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".
Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.
Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().
For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.
Tested on Network Space v2.
Reported-by: Joey Oravec <joravec@drewtech.com>
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/irq.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h index 8b453844663..baa397eb9c3 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -676,7 +676,8 @@ void irq_gc_mask_disable_reg(struct irq_data *d); void irq_gc_mask_set_bit(struct irq_data *d); void irq_gc_mask_clr_bit(struct irq_data *d); void irq_gc_unmask_enable_reg(struct irq_data *d); -void irq_gc_ack(struct irq_data *d); +void irq_gc_ack_set_bit(struct irq_data *d); +void irq_gc_ack_clr_bit(struct irq_data *d); void irq_gc_mask_disable_reg_and_ack(struct irq_data *d); void irq_gc_eoi(struct irq_data *d); int irq_gc_set_wake(struct irq_data *d, unsigned int on); |