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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-06-01 15:20:22 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-09-20 14:22:57 +0200 |
| commit | 9da3da660d8c19a54f6e93361d147509be3fff84 (patch) | |
| tree | 3479ef13a733975a02dd679e3fc9ae0872e3be25 /include/drm/intel-gtt.h | |
| parent | f60d7f0c1d55a935475ab394955cafddefaa6533 (diff) | |
| download | linux-3.10-9da3da660d8c19a54f6e93361d147509be3fff84.tar.gz linux-3.10-9da3da660d8c19a54f6e93361d147509be3fff84.tar.bz2 linux-3.10-9da3da660d8c19a54f6e93361d147509be3fff84.zip | |
drm/i915: Replace the array of pages with a scatterlist
Rather than have multiple data structures for describing our page layout
in conjunction with the array of pages, we can migrate all users over to
a scatterlist.
One major advantage, other than unifying the page tracking structures,
this offers is that we replace the vmalloc'ed array (which can be up to
a megabyte in size) with a chain of individual pages which helps reduce
memory pressure.
The disadvantage is that we then do not have a simple array to iterate,
or to access randomly. The common case for this is in the relocation
processing, which will typically fit within a single scatterlist page
and so be almost the same cost as the simple array. For iterating over
the array, the extra function call could be optimised away, but in
reality is an insignificant cost of either binding the pages, or
performing the pwrite/pread.
v2: Fix drm_clflush_sg() to not invoke wbinvd as well! And fix the
trivial compile error from rebasing.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/drm/intel-gtt.h')
| -rw-r--r-- | include/drm/intel-gtt.h | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h index 8e29d551bb3..2e37e9f02e7 100644 --- a/include/drm/intel-gtt.h +++ b/include/drm/intel-gtt.h @@ -30,16 +30,10 @@ void intel_gmch_remove(void); bool intel_enable_gtt(void); void intel_gtt_chipset_flush(void); -void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg); -void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); -int intel_gtt_map_memory(struct page **pages, unsigned int num_entries, - struct scatterlist **sg_list, int *num_sg); -void intel_gtt_insert_sg_entries(struct scatterlist *sg_list, - unsigned int sg_len, +void intel_gtt_insert_sg_entries(struct sg_table *st, unsigned int pg_start, unsigned int flags); -void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries, - struct page **pages, unsigned int flags); +void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); /* Special gtt memory types */ #define AGP_DCACHE_MEMORY 1 |