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authorKevin Hilman <khilman@deeprootsystems.com>2009-04-06 15:01:19 +0300
committerPierre Ossman <pierre@ossman.eu>2009-04-08 20:35:55 +0200
commit00adadc12196c7b3e8923729e728162267e98ff7 (patch)
tree721b4f4bb77767c0928fd98b322b433c8dc217a7 /drivers
parent32710e8fd537adeb53f98dec92e4a77caac512f5 (diff)
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omap_hsmmc: Flush posted write to IRQ
Spurious IRQs seen on MMC after 2.6.29. Flush posted write in IRQ handler. The interrupt line is released by clearing the error status bits in the MMCHS_STAT register, which must occur before the interrupt handler returns to avoid unwanted irqs. Hence the need to flush the posted write. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Acked-by: Tony Lindgen <tony@atomide.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/host/omap_hsmmc.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index d183be6f2a5..a752788fa4e 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -434,6 +434,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
if (host->mrq == NULL) {
OMAP_HSMMC_WRITE(host->base, STAT,
OMAP_HSMMC_READ(host->base, STAT));
+ /* Flush posted write */
+ OMAP_HSMMC_READ(host->base, STAT);
return IRQ_HANDLED;
}
@@ -489,6 +491,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
}
OMAP_HSMMC_WRITE(host->base, STAT, status);
+ /* Flush posted write */
+ OMAP_HSMMC_READ(host->base, STAT);
if (end_cmd || (status & CC))
mmc_omap_cmd_done(host, host->cmd);