diff options
author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-30 22:57:33 -0300 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 11:26:23 -0300 |
commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /drivers/spi | |
parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) | |
download | linux-3.10-25985edcedea6396277003854657b5f3cb31a628.tar.gz linux-3.10-25985edcedea6396277003854657b5f3cb31a628.tar.bz2 linux-3.10-25985edcedea6396277003854657b5f3cb31a628.zip |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/amba-pl022.c | 16 | ||||
-rw-r--r-- | drivers/spi/au1550_spi.c | 2 | ||||
-rw-r--r-- | drivers/spi/dw_spi.c | 2 | ||||
-rw-r--r-- | drivers/spi/dw_spi.h | 2 | ||||
-rw-r--r-- | drivers/spi/ep93xx_spi.c | 2 | ||||
-rw-r--r-- | drivers/spi/pxa2xx_spi.c | 4 | ||||
-rw-r--r-- | drivers/spi/spi.c | 2 | ||||
-rw-r--r-- | drivers/spi/spi_bfin5xx.c | 2 | ||||
-rw-r--r-- | drivers/spi/spi_fsl_espi.c | 2 |
9 files changed, 17 insertions, 17 deletions
diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c index 5a4e0afb9ad..5825370bad2 100644 --- a/drivers/spi/amba-pl022.c +++ b/drivers/spi/amba-pl022.c @@ -661,7 +661,7 @@ static void readwriter(struct pl022 *pl022) { /* - * The FIFO depth is different inbetween primecell variants. + * The FIFO depth is different between primecell variants. * I believe filling in too much in the FIFO might cause * errons in 8bit wide transfers on ARM variants (just 8 words * FIFO, means only 8x8 = 64 bits in FIFO) at least. @@ -722,7 +722,7 @@ static void readwriter(struct pl022 *pl022) * This inner reader takes care of things appearing in the RX * FIFO as we're transmitting. This will happen a lot since the * clock starts running when you put things into the TX FIFO, - * and then things are continously clocked into the RX FIFO. + * and then things are continuously clocked into the RX FIFO. */ while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE) && (pl022->rx < pl022->rx_end)) { @@ -842,7 +842,7 @@ static void dma_callback(void *data) unmap_free_dma_scatter(pl022); - /* Update total bytes transfered */ + /* Update total bytes transferred */ msg->actual_length += pl022->cur_transfer->len; if (pl022->cur_transfer->cs_change) pl022->cur_chip-> @@ -1224,7 +1224,7 @@ static irqreturn_t pl022_interrupt_handler(int irq, void *dev_id) "number of bytes on a 16bit bus?)\n", (u32) (pl022->rx - pl022->rx_end)); } - /* Update total bytes transfered */ + /* Update total bytes transferred */ msg->actual_length += pl022->cur_transfer->len; if (pl022->cur_transfer->cs_change) pl022->cur_chip-> @@ -1415,11 +1415,11 @@ static void do_polling_transfer(struct pl022 *pl022) SSP_CR1(pl022->virtbase)); dev_dbg(&pl022->adev->dev, "polling transfer ongoing ...\n"); - /* FIXME: insert a timeout so we don't hang here indefinately */ + /* FIXME: insert a timeout so we don't hang here indefinitely */ while (pl022->tx < pl022->tx_end || pl022->rx < pl022->rx_end) readwriter(pl022); - /* Update total byte transfered */ + /* Update total byte transferred */ message->actual_length += pl022->cur_transfer->len; if (pl022->cur_transfer->cs_change) pl022->cur_chip->cs_control(SSP_CHIP_DESELECT); @@ -2129,7 +2129,7 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id) "probe - problem registering spi master\n"); goto err_spi_register; } - dev_dbg(dev, "probe succeded\n"); + dev_dbg(dev, "probe succeeded\n"); /* * Disable the silicon block pclk and any voltage domain and just * power it up and clock it when it's needed @@ -2184,7 +2184,7 @@ pl022_remove(struct amba_device *adev) spi_unregister_master(pl022->master); spi_master_put(pl022->master); amba_set_drvdata(adev, NULL); - dev_dbg(&adev->dev, "remove succeded\n"); + dev_dbg(&adev->dev, "remove succeeded\n"); return 0; } diff --git a/drivers/spi/au1550_spi.c b/drivers/spi/au1550_spi.c index 3c9ade69643..b50563d320e 100644 --- a/drivers/spi/au1550_spi.c +++ b/drivers/spi/au1550_spi.c @@ -480,7 +480,7 @@ static irqreturn_t au1550_spi_dma_irq_callback(struct au1550_spi *hw) au1xxx_dbdma_stop(hw->dma_rx_ch); au1xxx_dbdma_stop(hw->dma_tx_ch); - /* get number of transfered bytes */ + /* get number of transferred bytes */ hw->rx_count = hw->len - au1xxx_get_dma_residue(hw->dma_rx_ch); hw->tx_count = hw->len - au1xxx_get_dma_residue(hw->dma_tx_ch); diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c index 9a6196461b2..b1a4b9f503a 100644 --- a/drivers/spi/dw_spi.c +++ b/drivers/spi/dw_spi.c @@ -345,7 +345,7 @@ static void int_error_stop(struct dw_spi *dws, const char *msg) void dw_spi_xfer_done(struct dw_spi *dws) { - /* Update total byte transfered return count actual bytes read */ + /* Update total byte transferred return count actual bytes read */ dws->cur_msg->actual_length += dws->len; /* Move to next transfer */ diff --git a/drivers/spi/dw_spi.h b/drivers/spi/dw_spi.h index fb0bce56484..b23e452adaf 100644 --- a/drivers/spi/dw_spi.h +++ b/drivers/spi/dw_spi.h @@ -46,7 +46,7 @@ #define SPI_INT_RXFI (1 << 4) #define SPI_INT_MSTI (1 << 5) -/* TX RX interrupt level threshhold, max can be 256 */ +/* TX RX interrupt level threshold, max can be 256 */ #define SPI_INT_THRESHOLD 32 enum dw_ssi_type { diff --git a/drivers/spi/ep93xx_spi.c b/drivers/spi/ep93xx_spi.c index 0ba35df9a6d..d3570071e98 100644 --- a/drivers/spi/ep93xx_spi.c +++ b/drivers/spi/ep93xx_spi.c @@ -512,7 +512,7 @@ static int ep93xx_spi_read_write(struct ep93xx_spi *espi) * * This function processes one SPI transfer given in @t. Function waits until * transfer is complete (may sleep) and updates @msg->status based on whether - * transfer was succesfully processed or not. + * transfer was successfully processed or not. */ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi, struct spi_message *msg, diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index a429b01d028..9c74aad6be9 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c @@ -700,7 +700,7 @@ static void int_transfer_complete(struct driver_data *drv_data) if (!pxa25x_ssp_comp(drv_data)) write_SSTO(0, reg); - /* Update total byte transfered return count actual bytes read */ + /* Update total byte transferred return count actual bytes read */ drv_data->cur_msg->actual_length += drv_data->len - (drv_data->rx_end - drv_data->rx); @@ -759,7 +759,7 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) /* * PXA25x_SSP has no timeout, set up rx threshould for the - * remaing RX bytes. + * remaining RX bytes. */ if (pxa25x_ssp_comp(drv_data)) { diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 34bb17f0301..82b9a428c32 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -957,7 +957,7 @@ EXPORT_SYMBOL_GPL(spi_sync); * drivers may DMA directly into and out of the message buffers. * * This call should be used by drivers that require exclusive access to the - * SPI bus. It has to be preceeded by a spi_bus_lock call. The SPI bus must + * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must * be released by a spi_bus_unlock call when the exclusive access is over. * * It returns zero on success, else a negative error code. diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index a28462486df..bdb7289a1d2 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c @@ -905,7 +905,7 @@ static void bfin_spi_pump_transfers(unsigned long data) "IO write error!\n"); message->state = ERROR_STATE; } else { - /* Update total byte transfered */ + /* Update total byte transferred */ message->actual_length += drv_data->len_in_bytes; /* Move to next transfer of this msg */ message->state = bfin_spi_next_transfer(drv_data); diff --git a/drivers/spi/spi_fsl_espi.c b/drivers/spi/spi_fsl_espi.c index 900e921ab80..496f895a002 100644 --- a/drivers/spi/spi_fsl_espi.c +++ b/drivers/spi/spi_fsl_espi.c @@ -474,7 +474,7 @@ static int fsl_espi_setup(struct spi_device *spi) mpc8xxx_spi = spi_master_get_devdata(spi->master); reg_base = mpc8xxx_spi->reg_base; - hw_mode = cs->hw_mode; /* Save orginal settings */ + hw_mode = cs->hw_mode; /* Save original settings */ cs->hw_mode = mpc8xxx_spi_read_reg( ®_base->csmode[spi->chip_select]); /* mask out bits we are going to set */ |