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authorAlex Deucher <alexander.deucher@amd.com>2012-03-20 17:18:31 -0400
committerDave Airlie <airlied@redhat.com>2012-03-21 06:55:56 +0000
commit729b95ef03fbfc1b0587eedbcfbaf0cb6d27be93 (patch)
tree8e8108ff8a242792cdbde5e3971dcc453dd8c467 /drivers/gpu/drm
parentca7db22bc59ced2f180f37db8470140225d75860 (diff)
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drm/radeon/kms: DCE6.1 disp eng pll updates
DCE6.1 uses EXT_PLL1 for disp eng. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 6fe4a6dc4d6..224775beb47 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -767,7 +767,9 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev,
* SetPixelClock provides the dividers
*/
args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);
- if (ASIC_IS_DCE6(rdev))
+ if (ASIC_IS_DCE61(rdev))
+ args.v6.ucPpll = ATOM_EXT_PLL1;
+ else if (ASIC_IS_DCE6(rdev))
args.v6.ucPpll = ATOM_PPLL0;
else
args.v6.ucPpll = ATOM_DCPLL;