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authorAlex Deucher <alexander.deucher@amd.com>2013-10-10 11:47:01 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-12-04 10:57:35 -0800
commitd2e99b2fc1056d2c5f4bf7fd691d37ba216c1455 (patch)
treef876a132bca590caeadc21eb89349bc7a13b3640 /drivers/gpu/drm/radeon/r600_hdmi.c
parent26f99321a04b01d59cedc434788830fd31b3c7d9 (diff)
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drm/radeon: re-enable sw ACR support on pre-DCE4
commit b852c985010a77c850b7548d64bbb964ca462b02 upstream. HW ACR support may have issues on some older chips, so use SW ACR for now until we've tested further. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> CC: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_hdmi.c')
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 7b3e1f1e8fb..635e8f2e84f 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -320,6 +320,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
}
WREG32(HDMI0_ACR_PACKET_CONTROL + offset,
+ HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */
HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
WREG32(HDMI0_VBI_PACKET_CONTROL + offset,