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authorBen Skeggs <bskeggs@redhat.com>2013-01-31 14:57:33 +1000
committerBen Skeggs <bskeggs@redhat.com>2013-02-20 16:00:48 +1000
commite18c080fb8695d038f69c26c248f5ecbd9e8aa77 (patch)
tree74e191678bb9ba028d85e219863ddb706f4e6fc8 /drivers/gpu/drm/nouveau/nvc0_fence.c
parenta2fa297378c54e9b8b8ad355e34c9fbed730250b (diff)
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drm/nouveau/fence/nv84-: put processes to sleep while waiting on fences
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvc0_fence.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_fence.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c
index 2a56b1b551c..d8ed2c5f4fa 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fence.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fence.c
@@ -62,13 +62,14 @@ nvc0_fence_emit(struct nouveau_fence *fence)
u64 addr = fctx->vma.offset + fifo->chid * 16;
int ret;
- ret = RING_SPACE(chan, 5);
+ ret = RING_SPACE(chan, 6);
if (ret == 0) {
- BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
+ BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5);
OUT_RING (chan, upper_32_bits(addr));
OUT_RING (chan, lower_32_bits(addr));
OUT_RING (chan, fence->sequence);
OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
+ OUT_RING (chan, 0x00000000);
FIRE_RING (chan);
}
@@ -217,6 +218,9 @@ nvc0_fence_create(struct nouveau_drm *drm)
priv->base.sync = nvc0_fence_sync;
priv->base.read = nvc0_fence_read;
+ init_waitqueue_head(&priv->base.waiting);
+ priv->base.uevent = true;
+
ret = nouveau_bo_new(drm->dev, 16 * (pfifo->max + 1), 0,
TTM_PL_FLAG_VRAM, 0, 0, NULL, &priv->bo);
if (ret == 0) {