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author | Ben Skeggs <bskeggs@redhat.com> | 2013-02-14 13:20:17 +1000 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2013-02-20 16:00:53 +1000 |
commit | 827520ce06568f699dad275dcca61647cce08757 (patch) | |
tree | 707c9ab051ca1bd8a14f14fb153510c7fbf133c3 /drivers/gpu/drm/nouveau/nvc0_fence.c | |
parent | 60e5cb79cbd27a36836fc04177d7c323ee873563 (diff) | |
download | linux-3.10-827520ce06568f699dad275dcca61647cce08757.tar.gz linux-3.10-827520ce06568f699dad275dcca61647cce08757.tar.bz2 linux-3.10-827520ce06568f699dad275dcca61647cce08757.zip |
drm/nouveau/fence: make internal hooks part of the context
A step towards being able to provide fences from other engines not
connected to PFIFO.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvc0_fence.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fence.c | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c index 8213f7de92f..b7def390d80 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fence.c +++ b/drivers/gpu/drm/nouveau/nvc0_fence.c @@ -66,6 +66,18 @@ nvc0_fence_sync32(struct nouveau_channel *chan, u64 virtual, u32 sequence) return ret; } +static int +nvc0_fence_context_new(struct nouveau_channel *chan) +{ + int ret = nv84_fence_context_new(chan); + if (ret == 0) { + struct nv84_fence_chan *fctx = chan->fence; + fctx->base.emit32 = nvc0_fence_emit32; + fctx->base.sync32 = nvc0_fence_sync32; + } + return ret; +} + int nvc0_fence_create(struct nouveau_drm *drm) { @@ -80,13 +92,8 @@ nvc0_fence_create(struct nouveau_drm *drm) priv->base.dtor = nv84_fence_destroy; priv->base.suspend = nv84_fence_suspend; priv->base.resume = nv84_fence_resume; - priv->base.context_new = nv84_fence_context_new; + priv->base.context_new = nvc0_fence_context_new; priv->base.context_del = nv84_fence_context_del; - priv->base.emit32 = nvc0_fence_emit32; - priv->base.emit = nv84_fence_emit; - priv->base.sync32 = nvc0_fence_sync32; - priv->base.sync = nv84_fence_sync; - priv->base.read = nv84_fence_read; init_waitqueue_head(&priv->base.waiting); priv->base.uevent = true; |