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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-12 19:27:12 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-17 10:10:02 +0200 |
| commit | fac3274c4ee090140410b2f29d3fbd8f10eae186 (patch) | |
| tree | 76dddaff935feeb008bb4c3d35538325ce92e176 /drivers/gpu/drm/i915/intel_dvo.c | |
| parent | d2434ab7fb085ac6848acd9d82366f96a642e471 (diff) | |
| download | linux-3.10-fac3274c4ee090140410b2f29d3fbd8f10eae186.tar.gz linux-3.10-fac3274c4ee090140410b2f29d3fbd8f10eae186.tar.bz2 linux-3.10-fac3274c4ee090140410b2f29d3fbd8f10eae186.zip | |
drm/i915: simplify dvo dpms interface
All dvo drivers only support 2 dpms states, and our dvo driver
even switches of the dvo port for anything else than DPMS_ON. Hence
ditch this complexity and simply use bool enable.
While reading through this code I've noticed that the mode_set
function of ch7017 is a bit peculiar - it disable the lvds again, even
though the crtc helper code should have done that ... This might be to
work around an issue at driver load, we pretty much ignore the hw
state when taking over.
v2: Also do the conversion for the new ns2501 driver.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dvo.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dvo.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index 03dfdff8e00..227551f12d2 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -115,9 +115,9 @@ static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) if (mode == DRM_MODE_DPMS_ON) { I915_WRITE(dvo_reg, temp | DVO_ENABLE); I915_READ(dvo_reg); - intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode); + intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); } else { - intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode); + intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); I915_READ(dvo_reg); } |