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authorLinus Torvalds <torvalds@linux-foundation.org>2010-06-01 14:12:27 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-06-01 14:12:27 -0700
commit709d015bb810a3377feaee3093d110a17e919019 (patch)
tree7a003395ddf648950de114f1da6968c879d8c164 /drivers/char
parent08a66859e69264f3223560d06b88e80c1a6a6387 (diff)
parente3a815fcd38043b8f1bb526123d8ab6ae01deb77 (diff)
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Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (41 commits) drm/i915: add HAS_BSD check to i915_getparam drm/i915: Honor sync polarity from VBT panel timing descriptors drm/i915: Unmask interrupt for render engine on Sandybridge drm/i915: Fix PIPE_CONTROL command on Sandybridge drm/i915: Fix up address spaces in slow_kernel_write() drm/i915: Use non-atomic kmap for slow copy paths drm/i915: Avoid moving from CPU domain during pwrite drm/i915: Cleanup after failed initialization of ringbuffers drm/i915: Reject bind_to_gtt() early if object > aperture drm/i915: Check error code whilst moving buffer to GTT domain. drm/i915: Remove spurious warning "Failure to install fence" drm/i915: Rebind bo if currently bound with incorrect alignment. drm/i915: Include pitch in set_base debug statement. drm/i915: Only print "nothing to do" debug message as required. drm/i915: Propagate error from unbinding an unfenceable object. drm/i915: Avoid nesting of domain changes when setting display plane drm/i915: Hold the spinlock whilst resetting unpin_work along error path drm/i915: Only print an message if there was an error drm/i915: Clean up leftover bits from hws move to ring structure. drm/i915: Add CxSR support on Pineview DDR3 ...
Diffstat (limited to 'drivers/char')
-rw-r--r--drivers/char/agp/intel-gtt.c46
1 files changed, 39 insertions, 7 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index e8ea6825822..9344216183a 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1059,7 +1059,7 @@ static void intel_i9xx_setup_flush(void)
}
}
-static int intel_i915_configure(void)
+static int intel_i9xx_configure(void)
{
struct aper_size_info_fixed *current_size;
u32 temp;
@@ -1207,6 +1207,38 @@ static int intel_i9xx_fetch_size(void)
return 0;
}
+static int intel_i915_get_gtt_size(void)
+{
+ int size;
+
+ if (IS_G33) {
+ u16 gmch_ctrl;
+
+ /* G33's GTT size defined in gmch_ctrl */
+ pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
+ switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {
+ case G33_PGETBL_SIZE_1M:
+ size = 1024;
+ break;
+ case G33_PGETBL_SIZE_2M:
+ size = 2048;
+ break;
+ default:
+ dev_info(&agp_bridge->dev->dev,
+ "unknown page table size 0x%x, assuming 512KB\n",
+ (gmch_ctrl & G33_PGETBL_SIZE_MASK));
+ size = 512;
+ }
+ } else {
+ /* On previous hardware, the GTT size was just what was
+ * required to map the aperture.
+ */
+ size = agp_bridge->driver->fetch_size();
+ }
+
+ return KB(size);
+}
+
/* The intel i915 automatically initializes the agp aperture during POST.
* Use the memory already set aside for in the GTT.
*/
@@ -1216,7 +1248,7 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
struct aper_size_info_fixed *size;
int num_entries;
u32 temp, temp2;
- int gtt_map_size = 256 * 1024;
+ int gtt_map_size;
size = agp_bridge->current_size;
page_order = size->page_order;
@@ -1226,8 +1258,8 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
pci_read_config_dword(intel_private.pcidev, I915_PTEADDR, &temp2);
- if (IS_G33)
- gtt_map_size = 1024 * 1024; /* 1M on G33 */
+ gtt_map_size = intel_i915_get_gtt_size();
+
intel_private.gtt = ioremap(temp2, gtt_map_size);
if (!intel_private.gtt)
return -ENOMEM;
@@ -1422,7 +1454,7 @@ static const struct agp_bridge_driver intel_915_driver = {
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 4,
.needs_scratch_page = true,
- .configure = intel_i915_configure,
+ .configure = intel_i9xx_configure,
.fetch_size = intel_i9xx_fetch_size,
.cleanup = intel_i915_cleanup,
.mask_memory = intel_i810_mask_memory,
@@ -1455,7 +1487,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 4,
.needs_scratch_page = true,
- .configure = intel_i915_configure,
+ .configure = intel_i9xx_configure,
.fetch_size = intel_i9xx_fetch_size,
.cleanup = intel_i915_cleanup,
.mask_memory = intel_i965_mask_memory,
@@ -1488,7 +1520,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 4,
.needs_scratch_page = true,
- .configure = intel_i915_configure,
+ .configure = intel_i9xx_configure,
.fetch_size = intel_i9xx_fetch_size,
.cleanup = intel_i915_cleanup,
.mask_memory = intel_i965_mask_memory,