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authorGreg Rose <gregory.v.rose@intel.com>2012-11-13 04:03:19 +0000
committerDavid S. Miller <davem@davemloft.net>2012-11-13 14:18:14 -0500
commit85624caff9decc8174f286e12e9d0038d9a6cced (patch)
treef68d6c91591df767eb03ef31c446be2f5f19500a /crypto/xcbc.c
parent366c1099123a0084cda581bee632911822748c61 (diff)
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ixgbevf: Reduce size of maximum rx buffer
There's no need to support up to 15k buffers since the HW is limited to 9.5k in SR-IOV mode. Instead, allocate buffers that fit and align inside of a 32K memory buffer. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'crypto/xcbc.c')
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