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| author | Rajesh Shah <rajesh.shah@intel.com> | 2006-05-03 15:27:47 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-06-21 11:59:59 -0700 |
| commit | 53e4d30dd666d7f83598957ee4a415eefb47c9a6 (patch) | |
| tree | 3fb71e7d79e6290ea7758ae45d297912a4407ae9 /arch | |
| parent | 9c273b95808c270149e9be9e172e4ef19f5d5c98 (diff) | |
| download | linux-3.10-53e4d30dd666d7f83598957ee4a415eefb47c9a6.tar.gz linux-3.10-53e4d30dd666d7f83598957ee4a415eefb47c9a6.tar.bz2 linux-3.10-53e4d30dd666d7f83598957ee4a415eefb47c9a6.zip | |
[PATCH] PCI: i386/x86_84: disable PCI resource decode on device disable
When a PCI device is disabled via pci_disable_device(), it's still
left decoding its BAR resource ranges even though its driver
will have likely released those regions (and may even have
unloaded). pci_enable_device() already explicitly enables
BAR resource decode for the device being enabled. This patch
disables resource decode for the PCI device being disabled,
making it symmetric with the enable call.
I saw this while doing something else, not because of a
problem report. Still, seems to be the correct thing to do.
Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/i386/pci/common.c | 1 | ||||
| -rw-r--r-- | arch/i386/pci/i386.c | 9 | ||||
| -rw-r--r-- | arch/i386/pci/pci.h | 1 |
3 files changed, 11 insertions, 0 deletions
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c index dbece776c5b..c624b61e110 100644 --- a/arch/i386/pci/common.c +++ b/arch/i386/pci/common.c @@ -288,6 +288,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) void pcibios_disable_device (struct pci_dev *dev) { + pcibios_disable_resources(dev); if (pcibios_disable_irq) pcibios_disable_irq(dev); } diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c index ed2c8c899bd..7852827a599 100644 --- a/arch/i386/pci/i386.c +++ b/arch/i386/pci/i386.c @@ -242,6 +242,15 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) return 0; } +void pcibios_disable_resources(struct pci_dev *dev) +{ + u16 cmd; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY); + pci_write_config_word(dev, PCI_COMMAND, cmd); +} + /* * If we set up a device for bus mastering, we need to check the latency * timer as certain crappy BIOSes forget to set it properly. diff --git a/arch/i386/pci/pci.h b/arch/i386/pci/pci.h index 12035e29108..12bf3d8dda2 100644 --- a/arch/i386/pci/pci.h +++ b/arch/i386/pci/pci.h @@ -35,6 +35,7 @@ extern unsigned int pcibios_max_latency; void pcibios_resource_survey(void); int pcibios_enable_resources(struct pci_dev *, int); +void pcibios_disable_resources(struct pci_dev *); /* pci-pc.c */ |