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authorDavid S. Miller <davem@davemloft.net>2013-04-06 17:51:48 -0400
committerDavid S. Miller <davem@davemloft.net>2013-04-06 17:51:48 -0400
commit598ec971ddcf7dcb0c381230e69a39c75b7fac1a (patch)
treecc8c1268d7d3a27f51e0a13adc04d68375eb85a8 /arch/sparc/include/asm
parentd6d88bae97d2e1c44ef9e2ae3f22de82fa6e11c5 (diff)
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sparc: Consistently use 'wr' and 'rd' instructions for ASRs.
For consistency, don't use 'mov'. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm')
-rw-r--r--arch/sparc/include/asm/head_32.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/sparc/include/asm/head_32.h b/arch/sparc/include/asm/head_32.h
index a76874838f6..5f1dbe315bc 100644
--- a/arch/sparc/include/asm/head_32.h
+++ b/arch/sparc/include/asm/head_32.h
@@ -55,15 +55,15 @@
/* The Get Condition Codes software trap for userland. */
#define GETCC_TRAP \
- b getcc_trap_handler; mov %psr, %l0; nop; nop;
+ b getcc_trap_handler; rd %psr, %l0; nop; nop;
/* The Set Condition Codes software trap for userland. */
#define SETCC_TRAP \
- b setcc_trap_handler; mov %psr, %l0; nop; nop;
+ b setcc_trap_handler; rd %psr, %l0; nop; nop;
/* The Get PSR software trap for userland. */
#define GETPSR_TRAP \
- mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
+ rd %psr, %i0; jmp %l2; rett %l2 + 4; nop;
/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
* gets handled with another macro.