summaryrefslogtreecommitdiff
path: root/arch/sh/mm/flush-sh4.c
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2009-08-04 18:06:01 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-08-04 18:06:01 +0900
commit817425275271f2514f0dc6952182aa057ce80973 (patch)
tree09c32a42c4700bc0cf7ea31a232a17c45d1e0824 /arch/sh/mm/flush-sh4.c
parentd14d751ff9234595639a16e53b3cf0c575946bde (diff)
downloadlinux-3.10-817425275271f2514f0dc6952182aa057ce80973.tar.gz
linux-3.10-817425275271f2514f0dc6952182aa057ce80973.tar.bz2
linux-3.10-817425275271f2514f0dc6952182aa057ce80973.zip
sh: Split out SH-4 __flush_xxx_region() ops.
This splits out the SH-4 __flush_xxx_region() functions and defines them as weak symbols. This allows us to provide optimized versions without having to ifdef cache-sh4.c to death. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/flush-sh4.c')
-rw-r--r--arch/sh/mm/flush-sh4.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/sh/mm/flush-sh4.c b/arch/sh/mm/flush-sh4.c
new file mode 100644
index 00000000000..e6d918f6ec0
--- /dev/null
+++ b/arch/sh/mm/flush-sh4.c
@@ -0,0 +1,63 @@
+#include <linux/mm.h>
+#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+
+/*
+ * Write back the dirty D-caches, but not invalidate them.
+ *
+ * START: Virtual Address (U0, P1, or P3)
+ * SIZE: Size of the region.
+ */
+void __weak __flush_wback_region(void *start, int size)
+{
+ unsigned long v;
+ unsigned long begin, end;
+
+ begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
+ end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
+ & ~(L1_CACHE_BYTES-1);
+ for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+ asm volatile("ocbwb %0"
+ : /* no output */
+ : "m" (__m(v)));
+ }
+}
+
+/*
+ * Write back the dirty D-caches and invalidate them.
+ *
+ * START: Virtual Address (U0, P1, or P3)
+ * SIZE: Size of the region.
+ */
+void __weak __flush_purge_region(void *start, int size)
+{
+ unsigned long v;
+ unsigned long begin, end;
+
+ begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
+ end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
+ & ~(L1_CACHE_BYTES-1);
+ for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+ asm volatile("ocbp %0"
+ : /* no output */
+ : "m" (__m(v)));
+ }
+}
+
+/*
+ * No write back please
+ */
+void __weak __flush_invalidate_region(void *start, int size)
+{
+ unsigned long v;
+ unsigned long begin, end;
+
+ begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
+ end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
+ & ~(L1_CACHE_BYTES-1);
+ for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+ asm volatile("ocbi %0"
+ : /* no output */
+ : "m" (__m(v)));
+ }
+}