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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-14 01:13:18 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-30 01:14:46 +0000 |
commit | 1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch) | |
tree | 0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/momentum | |
parent | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff) | |
download | linux-3.10-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.tar.gz linux-3.10-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.tar.bz2 linux-3.10-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.zip |
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ()
by proper flow handler would make the irq handling path a bit simpler
and faster.
* use generic_handle_irq() instead of __do_IRQ().
* use handle_level_irq for obvious level-type irq chips.
* use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
* setup .eoi routine for irq chips possibly used with handle_percpu_irq.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/momentum')
-rw-r--r-- | arch/mips/momentum/ocelot_c/cpci-irq.c | 2 | ||||
-rw-r--r-- | arch/mips/momentum/ocelot_c/uart-irq.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index 7723f099894..e5a4a0a8a7f 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c @@ -106,5 +106,5 @@ void cpci_irq_init(void) int i; for (i = CPCI_IRQ_BASE; i < (CPCI_IRQ_BASE + 8); i++) - set_irq_chip(i, &cpci_irq_type); + set_irq_chip_and_handler(i, &cpci_irq_type, handle_level_irq); } diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index 72faf81b36c..0029f0008de 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c @@ -96,6 +96,6 @@ struct irq_chip uart_irq_type = { void uart_irq_init(void) { - set_irq_chip(80, &uart_irq_type); - set_irq_chip(81, &uart_irq_type); + set_irq_chip_and_handler(80, &uart_irq_type, handle_level_irq); + set_irq_chip_and_handler(81, &uart_irq_type, handle_level_irq); } |