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| author | Aurelien Jarno <aurelien@aurel32.net> | 2007-09-25 15:40:12 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:02 +0100 |
| commit | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 (patch) | |
| tree | a274a6e2e56f519900fb35c544ddf279f38ca8d6 /arch/mips/mm | |
| parent | ea202c632a52c4a83f1bd82d8d06bc8e04f2689a (diff) | |
| download | linux-3.10-1c0c13eb935c95fd2ca0b0aca6dd4860487fb242.tar.gz linux-3.10-1c0c13eb935c95fd2ca0b0aca6dd4860487fb242.tar.bz2 linux-3.10-1c0c13eb935c95fd2ca0b0aca6dd4860487fb242.zip | |
[MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 6c425b05244..b2c6b9e4756 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -908,6 +908,8 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, case CPU_4KSC: case CPU_20KC: case CPU_25KF: + case CPU_BCM3302: + case CPU_BCM4710: case CPU_LOONGSON2: if (m4kc_tlbp_war()) i_nop(p); |