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| author | Jon Hunter <jon-hunter@ti.com> | 2012-07-13 14:03:18 -0500 |
|---|---|---|
| committer | Jon Hunter <jon-hunter@ti.com> | 2012-11-12 16:23:55 -0600 |
| commit | 4249d96ca35a765c25a70b7d29df5b6d80987c7f (patch) | |
| tree | 995dca58d99b8b8efe2e2db75085085f987c159e /arch/arm/plat-omap/include/plat | |
| parent | 991ad16a927c721b301f27aa9b61a13a24b54dda (diff) | |
| download | linux-3.10-4249d96ca35a765c25a70b7d29df5b6d80987c7f.tar.gz linux-3.10-4249d96ca35a765c25a70b7d29df5b6d80987c7f.tar.bz2 linux-3.10-4249d96ca35a765c25a70b7d29df5b6d80987c7f.zip | |
ARM: OMAP: Add dmtimer interrupt disable function
The OMAP dmtimer driver does not currently have a function to disable the
timer interrupts. For some timer instances the timer interrupt enable
function can be used to disable the interrupts because the same interrupt
enable register is used to disable interrupts. However, some timer instances
have separate interrupt enable/disable registers and so this will not work.
Therefore, add a dedicated function to disable interrupts.
This change is required for OMAP4+ devices. For OMAP4, all timers apart from 1,
2 and 10 need this function and for OMAP5 all timers need this function.
Please note that the interrupt disable function has been written so that it
can be used by all OMAP devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat')
| -rw-r--r-- | arch/arm/plat-omap/include/plat/dmtimer.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 0c07e375347..769efb6f30d 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -135,6 +135,7 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, i int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); +int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask); unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); @@ -321,7 +322,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) OMAP_TIMER_V1_SYS_STAT_OFFSET; timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; - timer->irq_dis = NULL; + timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; timer->func_base = timer->io_base; } else { |