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| author | Eric Bénard <eric@eukrea.com> | 2010-06-08 11:03:00 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-26 14:18:13 +0200 |
| commit | 8402ed30e16c65ad8560ba3293c7cf9c259712eb (patch) | |
| tree | 1a3a2ccde8c6c6f93e4f8fe75fa21d8dccb886cf /arch/arm/plat-mxc | |
| parent | 2518507f727e6bf663fd0f276369cbdeb6a0ccc0 (diff) | |
| download | linux-3.10-8402ed30e16c65ad8560ba3293c7cf9c259712eb.tar.gz linux-3.10-8402ed30e16c65ad8560ba3293c7cf9c259712eb.tar.bz2 linux-3.10-8402ed30e16c65ad8560ba3293c7cf9c259712eb.zip | |
i.MX25: add AUDMUX and SSI support
* add clocks for audmux and ssi 1 & 2
* add irq for ssi 1 & 2
* add devices platform for ssi1 & 2
* update audmux-v2 for i.MX25
* add base addresses for audmux & ssi 1 & 2
* add iomux configuration for GPIO for AUD5 port
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
| -rw-r--r-- | arch/arm/plat-mxc/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/audmux-v2.c | 15 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx25.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx25.h | 7 |
4 files changed, 25 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 7f7ad6f289b..902ba9e42c5 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -25,6 +25,7 @@ config ARCH_MX25 select CPU_ARM926T select ARCH_MXC_IOMUX_V3 select HAVE_FB_IMX + select ARCH_MXC_AUDMUX_V2 help This enables support for systems based on the Freescale i.MX25 family diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c index 0c2cc5cd4d8..ab94d78a927 100644 --- a/arch/arm/plat-mxc/audmux-v2.c +++ b/arch/arm/plat-mxc/audmux-v2.c @@ -191,6 +191,7 @@ static int mxc_audmux_v2_init(void) { int ret; +#if defined(CONFIG_ARCH_MX3) if (cpu_is_mx31()) audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR); @@ -204,7 +205,19 @@ static int mxc_audmux_v2_init(void) } audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR); } - +#endif +#if defined(CONFIG_ARCH_MX25) + if (cpu_is_mx25()) { + audmux_clk = clk_get(NULL, "audmux"); + if (IS_ERR(audmux_clk)) { + ret = PTR_ERR(audmux_clk); + printk(KERN_ERR "%s: cannot get clock: %d\n", __func__, + ret); + return ret; + } + audmux_base = MX25_IO_ADDRESS(MX25_AUDMUX_BASE_ADDR); + } +#endif audmux_debugfs_init(); return 0; diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h index e88d01a125a..1c8317e8ecc 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h @@ -389,15 +389,19 @@ #define MX25_PAD_KPP_ROW3__GPIO_3_0 IOMUX_PAD(0x3ac, 0x1b4, 0x15, 0, 0, NO_PAD_CTRL) #define MX25_PAD_KPP_COL0__KPP_COL0 IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, KPP_CTL_COL) +#define MX25_PAD_KPP_COL0__AUD5_TXD IOMUX_PAD(0x3b0, 0x1b8, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP) #define MX25_PAD_KPP_COL0__GPIO_3_1 IOMUX_PAD(0x3b0, 0x1b8, 0x15, 0, 0, NO_PAD_CTRL) #define MX25_PAD_KPP_COL1__KPP_COL1 IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, KPP_CTL_COL) +#define MX25_PAD_KPP_COL1__AUD5_RXD IOMUX_PAD(0x3b4, 0x1bc, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP) #define MX25_PAD_KPP_COL1__GPIO_3_2 IOMUX_PAD(0x3b4, 0x1bc, 0x15, 0, 0, NO_PAD_CTRL) #define MX25_PAD_KPP_COL2__KPP_COL2 IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, KPP_CTL_COL) +#define MX25_PAD_KPP_COL2__AUD5_TXC IOMUX_PAD(0x3b8, 0x1c0, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP) #define MX25_PAD_KPP_COL2__GPIO_3_3 IOMUX_PAD(0x3b8, 0x1c0, 0x15, 0, 0, NO_PAD_CTRL) #define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, KPP_CTL_COL) +#define MX25_PAD_KPP_COL3__AUD5_TXFS IOMUX_PAD(0x3bc, 0x1c4, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP) #define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL) #define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL) diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index f064ec8833b..a1ba9d7c55d 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -29,19 +29,24 @@ #define MX25_UART1_BASE_ADDR 0x43f90000 #define MX25_UART2_BASE_ADDR 0x43f94000 +#define MX25_AUDMUX_BASE_ADDR 0x43fb0000 #define MX25_FEC_BASE_ADDR 0x50038000 +#define MX25_SSI2_BASE_ADDR 0x50014000 +#define MX25_SSI1_BASE_ADDR 0x50034000 #define MX25_NFC_BASE_ADDR 0xbb000000 #define MX25_DRYICE_BASE_ADDR 0x53ffc000 #define MX25_LCDC_BASE_ADDR 0x53fbc000 #define MX25_KPP_BASE_ADDR 0x43fa8000 #define MX25_OTG_BASE_ADDR 0x53ff4000 +#define MX25_INT_SSI2 11 +#define MX25_INT_SSI1 12 #define MX25_INT_DRYICE 25 -#define MX25_INT_FEC 57 #define MX25_INT_NANDFC 33 #define MX25_INT_LCDC 39 #define MX25_INT_KPP 24 +#define MX25_INT_FEC 57 #if defined(IMX_NEEDS_DEPRECATED_SYMBOLS) #define UART1_BASE_ADDR MX25_UART1_BASE_ADDR |