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| author | Robert Lee <rob.lee@linaro.org> | 2012-05-21 17:50:26 -0500 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-06-05 08:49:10 +0200 |
| commit | 565fa91f236524b6ba4872903dc9cc9c874493e6 (patch) | |
| tree | bf0872ac1d86158da8209341b4d1eef0755f9150 /arch/arm/plat-mxc/include/mach | |
| parent | eee4f4003824b0887251a3ba4493217371816a57 (diff) | |
| download | linux-3.10-565fa91f236524b6ba4872903dc9cc9c874493e6.tar.gz linux-3.10-565fa91f236524b6ba4872903dc9cc9c874493e6.tar.bz2 linux-3.10-565fa91f236524b6ba4872903dc9cc9c874493e6.zip | |
ARM: imx: clean and consolidate imx5 suspend and idle code
The imx5 idle code that existed in mm-imx5.c is moved to pm-imx5.c.
The imx5_pm_init call is now exported and called during the
MACHINE_START late_init in supported imx5 platforms.
Remove various enabling/disabling of the gpc_dvfs clock and
enable it once during initialization. This is a very low
power clock that must be enabled during low power operations.
There are only two "suspend_state_t" imx5 low power modes ever
used. STOP_POWER_OFF for suspend to mem and
WAIT_UNCLOCKED_POWER_OFF for idle and suspend to standby. The
latter mode only requires 500 nanoseconds of extra hardware
exit time beyond a basic WFI operation (WAIT_CLOCKED mode) so
no other idle mode is necessary. Given this information, it
is more efficient to keep the registers in the often used
WAIT_UNCLOCKED_POWER_OFF state and only to and from the
STOP_POWER_OFF register state as needed when suspend to
mem is required.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index cf663d84e7c..f65d068e182 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -95,7 +95,6 @@ enum mx3_cpu_pwr_mode { }; extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); -extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); extern void imx_print_silicon_rev(const char *cpu, int srev); void avic_handle_irq(struct pt_regs *); @@ -146,8 +145,10 @@ extern void imx6q_clock_map_io(void); #ifdef CONFIG_PM extern void imx6q_pm_init(void); +extern void imx51_pm_init(void); #else static inline void imx6q_pm_init(void) {} +static inline void imx51_pm_init(void) {} #endif #ifdef CONFIG_NEON |