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| author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-09-18 23:26:25 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 10:25:53 +0100 |
| commit | c852ac80440db9b0a47f48578e9c6303078abbc1 (patch) | |
| tree | 0c7fc1ca7700b0196a20242ca306003db7e35fb6 /arch/arm/oprofile | |
| parent | 475549faa161f4e002225f2ef75fdd2a6d83d151 (diff) | |
| download | linux-3.10-c852ac80440db9b0a47f48578e9c6303078abbc1.tar.gz linux-3.10-c852ac80440db9b0a47f48578e9c6303078abbc1.tar.bz2 linux-3.10-c852ac80440db9b0a47f48578e9c6303078abbc1.zip | |
[ARM] 3832/1: iop3xx: coding style cleanup
Since the iop32x code isn't iop321-specific, and the iop33x code isn't
iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up
the code to conform to the coding style guidelines somewhat better.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/oprofile')
| -rw-r--r-- | arch/arm/oprofile/op_model_xscale.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c index 7e0cc5b15b1..6576143f255 100644 --- a/arch/arm/oprofile/op_model_xscale.c +++ b/arch/arm/oprofile/op_model_xscale.c @@ -37,10 +37,10 @@ #define XSCALE_PMU_IRQ IRQ_XS80200_PMU #endif #ifdef CONFIG_ARCH_IOP32X -#define XSCALE_PMU_IRQ IRQ_IOP321_CORE_PMU +#define XSCALE_PMU_IRQ IRQ_IOP32X_CORE_PMU #endif #ifdef CONFIG_ARCH_IOP33X -#define XSCALE_PMU_IRQ IRQ_IOP331_CORE_PMU +#define XSCALE_PMU_IRQ IRQ_IOP33X_CORE_PMU #endif #ifdef CONFIG_ARCH_PXA #define XSCALE_PMU_IRQ IRQ_PMU @@ -88,7 +88,7 @@ static struct pmu_counter results[MAX_COUNTERS]; /* * There are two versions of the PMU in current XScale processors * with differing register layouts and number of performance counters. - * e.g. IOP321 is xsc1 whilst IOP331 is xsc2. + * e.g. IOP32x is xsc1 whilst IOP33x is xsc2. * We detect which register layout to use in xscale_detect_pmu() */ enum { PMU_XSC1, PMU_XSC2 }; |