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author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-04-02 00:07:39 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-04-02 00:07:39 +0100 |
commit | 23759dc6430428897a36c4d493f611eca55c9481 (patch) | |
tree | c62050927599b36ed223753c35fd737e3c0c6762 /arch/arm/mach-ixp23xx | |
parent | d3f4c571b6e596f9d39c596426269006a309d3b8 (diff) | |
download | linux-3.10-23759dc6430428897a36c4d493f611eca55c9481.tar.gz linux-3.10-23759dc6430428897a36c4d493f611eca55c9481.tar.bz2 linux-3.10-23759dc6430428897a36c4d493f611eca55c9481.zip |
[ARM] 3439/2: xsc3: add I/O coherency support
Patch from Lennert Buytenhek
This patch adds support for the I/O coherent cache available on the
xsc3. The approach is to provide a simple API to determine whether the
chipset supports coherency by calling arch_is_coherent() and then
setting the appropriate system memory PTE and PMD bits. In addition,
we call this API on dma_alloc_coherent() and dma_map_single() calls.
A generic version exists that will compile out all the coherency-related
code that is not needed on the majority of ARM systems.
Note that we do not check for coherency in the dma_alloc_writecombine()
function as that still requires a special PTE setting. We also don't
touch dma_mmap_coherent() as that is a special ARM-only API that is by
definition only used on non-coherent system.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ixp23xx')
-rw-r--r-- | arch/arm/mach-ixp23xx/pci.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c index ba6b4367a1d..ac72f94c5b4 100644 --- a/arch/arm/mach-ixp23xx/pci.c +++ b/arch/arm/mach-ixp23xx/pci.c @@ -219,6 +219,12 @@ static void __init ixp23xx_pci_common_init(void) *IXP23XX_PCI_CPP_ADDR_BITS &= ~(1 << 1); } else { *IXP23XX_PCI_CPP_ADDR_BITS |= (1 << 1); + + /* + * Enable coherency on A2 silicon. + */ + if (arch_is_coherent()) + *IXP23XX_CPP2XSI_CURR_XFER_REG3 &= ~IXP23XX_CPP2XSI_COH_OFF; } } |