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| author | Fenghua Yu <fenghua.yu@intel.com> | 2012-12-20 23:44:21 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-01-31 13:18:47 -0800 |
| commit | 0d91ea86a895b911fd7d999acb3f600706d9c8cd (patch) | |
| tree | 1c0f94f2b5bf4faba0ab3f1525bcf3f80a0f5454 /Documentation/x86 | |
| parent | ac2cbab21f318e19bc176a7f38a120cec835220f (diff) | |
| download | linux-3.10-0d91ea86a895b911fd7d999acb3f600706d9c8cd.tar.gz linux-3.10-0d91ea86a895b911fd7d999acb3f600706d9c8cd.tar.bz2 linux-3.10-0d91ea86a895b911fd7d999acb3f600706d9c8cd.zip | |
x86, doc: Documentation for early microcode loading
Documenation for early loading microcode methodology.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1356075872-3054-2-git-send-email-fenghua.yu@intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'Documentation/x86')
| -rw-r--r-- | Documentation/x86/early-microcode.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/x86/early-microcode.txt b/Documentation/x86/early-microcode.txt new file mode 100644 index 00000000000..4aaf0dfb0cb --- /dev/null +++ b/Documentation/x86/early-microcode.txt @@ -0,0 +1,43 @@ +Early load microcode +==================== +By Fenghua Yu <fenghua.yu@intel.com> + +Kernel can update microcode in early phase of boot time. Loading microcode early +can fix CPU issues before they are observed during kernel boot time. + +Microcode is stored in an initrd file. The microcode is read from the initrd +file and loaded to CPUs during boot time. + +The format of the combined initrd image is microcode in cpio format followed by +the initrd image (maybe compressed). Kernel parses the combined initrd image +during boot time. The microcode file in cpio name space is: +kernel/x86/microcode/GenuineIntel.bin + +During BSP boot (before SMP starts), if the kernel finds the microcode file in +the initrd file, it parses the microcode and saves matching microcode in memory. +If matching microcode is found, it will be uploaded in BSP and later on in all +APs. + +The cached microcode patch is applied when CPUs resume from a sleep state. + +There are two legacy user space interfaces to load microcode, either through +/dev/cpu/microcode or through /sys/devices/system/cpu/microcode/reload file +in sysfs. + +In addition to these two legacy methods, the early loading method described +here is the third method with which microcode can be uploaded to a system's +CPUs. + +The following example script shows how to generate a new combined initrd file in +/boot/initrd-3.5.0.ucode.img with original microcode microcode.bin and +original initrd image /boot/initrd-3.5.0.img. + +mkdir initrd +cd initrd +mkdir kernel +mkdir kernel/x86 +mkdir kernel/x86/microcode +cp ../microcode.bin kernel/x86/microcode/GenuineIntel.bin +find .|cpio -oc >../ucode.cpio +cd .. +cat ucode.cpio /boot/initrd-3.5.0.img >/boot/initrd-3.5.0.ucode.img |