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| author | Inki Dae <inki.dae@samsung.com> | 2014-08-12 21:45:33 +0900 |
|---|---|---|
| committer | Chanho Park <chanho61.park@samsung.com> | 2014-11-18 12:00:30 +0900 |
| commit | eaa0d0a8976a3fb01ff6ef77cb9ffa0f876ba6fd (patch) | |
| tree | a2e89739571c15514850d7c7e4075e521a6c7ca9 | |
| parent | da0917141e13d3780a0e7af0f79a608419282712 (diff) | |
| download | linux-3.10-eaa0d0a8976a3fb01ff6ef77cb9ffa0f876ba6fd.tar.gz linux-3.10-eaa0d0a8976a3fb01ff6ef77cb9ffa0f876ba6fd.tar.bz2 linux-3.10-eaa0d0a8976a3fb01ff6ef77cb9ffa0f876ba6fd.zip | |
clk/exynos3250: do not define g3d/lcd block gate clock
This clock should be passed by default. If they are defined, then
these clocks will be masked in case that relevant drivers don't
enable them.
Change-Id: I8cb402642ac7e9b69c80d594a8be981477f679af
Signed-off-by: Inki Dae <inki.dae@samsung.com>
| -rw-r--r-- | drivers/clk/samsung/clk-exynos3250.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index e7c6f82e812..6fae3c8497e 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -622,10 +622,6 @@ static struct samsung_gate_clock gate_clks[] __initdata = { GATE(CLK_I2C0, "i2c0", "div_aclk_100", GATE_IP_PERIL, 6, 0, 0), GATE(CLK_UART1, "uart1", "div_aclk_100", GATE_IP_PERIL, 1, 0, 0), GATE(CLK_UART0, "uart0", "div_aclk_100", GATE_IP_PERIL, 0, 0, 0), - - /* GATE_BLOCK */ - GATE(CLK_BLOCK_LCD, "block_lcd", "div_aclk_160", GATE_BLOCK, 4, 0, 0), - GATE(CLK_BLOCK_G3D, "block_g3d", "div_aclk_200", GATE_BLOCK, 3, 0, 0), }; /* APLL & MPLL & BPLL & UPLL */ |