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author | H. Peter Anvin <hpa@linux.intel.com> | 2010-10-13 16:00:29 -0700 |
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committer | H. Peter Anvin <hpa@linux.intel.com> | 2010-10-13 16:00:29 -0700 |
commit | d7acb92fea932ad2e7846480aeacddc2c03c8485 (patch) | |
tree | 21675108634aff8885cb881a476acf7146191b87 | |
parent | 7fe977dab356fbd7e86aa10bf83891761107c57c (diff) | |
download | linux-3.10-d7acb92fea932ad2e7846480aeacddc2c03c8485.tar.gz linux-3.10-d7acb92fea932ad2e7846480aeacddc2c03c8485.tar.bz2 linux-3.10-d7acb92fea932ad2e7846480aeacddc2c03c8485.zip |
x86-64, asm: If the assembler supports fxsave64, use it
Kbuild allows for us to probe for the existence of specific constructs
in the assembler, use them to find out if we can use fxsave64 and
permit the compiler to generate better code.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r-- | arch/x86/Makefile | 8 | ||||
-rw-r--r-- | arch/x86/include/asm/i387.h | 2 |
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 8aa1b59b907..40668a96ca0 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -96,8 +96,12 @@ cfi := $(call as-instr,.cfi_startproc\n.cfi_rel_offset $(sp-y)$(comma)0\n.cfi_en # is .cfi_signal_frame supported too? cfi-sigframe := $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1) cfi-sections := $(call as-instr,.cfi_sections .debug_frame,-DCONFIG_AS_CFI_SECTIONS=1) -KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) -KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) + +# does binutils support specific instructions? +asinstr := $(call as-instr,fxsaveq (%rax),-DCONFIG_AS_FXSAVEQ=1) + +KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) +KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) LDFLAGS := -m elf_$(UTS_MACHINE) diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h index a73a8d5a5e6..70f105b352e 100644 --- a/arch/x86/include/asm/i387.h +++ b/arch/x86/include/asm/i387.h @@ -175,7 +175,7 @@ static inline void fpu_fxsave(struct fpu *fpu) uses any extended registers for addressing, a second REX prefix will be generated (to the assembler, rex64 followed by semicolon is a separate instruction), and hence the 64-bitness is lost. */ -#if 0 +#ifdef CONFIG_AS_FXSAVEQ /* Using "fxsaveq %0" would be the ideal choice, but is only supported starting with gas 2.16. */ __asm__ __volatile__("fxsaveq %0" |