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author | Axel Lin <axel.lin@gmail.com> | 2012-03-29 10:47:36 +0800 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-03-29 12:06:24 +0100 |
commit | cee1a799eb044657922c4d63003d7bf71f8c8b8d (patch) | |
tree | c3b5b304a90b68c8ad61231789e1535b98fdbe16 | |
parent | e841a36abb0f95ea356d52e4386b8e8f762e9c40 (diff) | |
download | linux-3.10-cee1a799eb044657922c4d63003d7bf71f8c8b8d.tar.gz linux-3.10-cee1a799eb044657922c4d63003d7bf71f8c8b8d.tar.bz2 linux-3.10-cee1a799eb044657922c4d63003d7bf71f8c8b8d.zip |
regulator: Only update [LDOx|DCx]_HIB_MODE bits in wm8350_[ldo|dcdc]_set_suspend_disable
What we want is to disable output by setting [LDOx|DCx]_HIB_MODE bits.
Current code also clears other bits in LDOx/DCDCx Low Power register.
R202 (CAh) LDO1 Low Power
BIT[13:12] LDO1 Hibernate behaviour:
00 = Select voltage image settings
01 = disable output
10 = reserved
11 = reserved
R182 (B6h) DCDC1 Low Power
BIT[14:12] DC-DC1 Hibernate behaviour:
000 = Use current settings (no change)
001 = Select voltage image settings
010 = Force standby mode
011 = Force standby mode and voltage image settings.
100 = Force LDO mode
101 = Force LDO mode and voltage image settings.
110 = Reserved.
111 = Disable output
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r-- | drivers/regulator/wm8350-regulator.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c index c5f3b4090d8..05ecfb87231 100644 --- a/drivers/regulator/wm8350-regulator.c +++ b/drivers/regulator/wm8350-regulator.c @@ -535,25 +535,25 @@ static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev) val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER); wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, - WM8350_DCDC_HIB_MODE_DIS); + val | WM8350_DCDC_HIB_MODE_DIS); break; case WM8350_DCDC_3: val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER); wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, - WM8350_DCDC_HIB_MODE_DIS); + val | WM8350_DCDC_HIB_MODE_DIS); break; case WM8350_DCDC_4: val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER); wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, - WM8350_DCDC_HIB_MODE_DIS); + val | WM8350_DCDC_HIB_MODE_DIS); break; case WM8350_DCDC_6: val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER); wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, - WM8350_DCDC_HIB_MODE_DIS); + val | WM8350_DCDC_HIB_MODE_DIS); break; case WM8350_DCDC_2: case WM8350_DCDC_5: @@ -749,7 +749,7 @@ static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev) /* all LDOs have same mV bits */ val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK; - wm8350_reg_write(wm8350, volt_reg, WM8350_LDO1_HIB_MODE_DIS); + wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS); return 0; } |