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author | Paul Mundt <lethal@linux-sh.org> | 2010-01-29 22:22:27 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-29 22:22:27 +0900 |
commit | ac8ab54a8e41a5ed0ee2161d45b6dc855490989f (patch) | |
tree | 6872b5d5942338d43ea520060e2b3f2a4287f652 | |
parent | a45635dfb08a1fa2cf77bf1f2c4074961ce2e625 (diff) | |
download | linux-3.10-ac8ab54a8e41a5ed0ee2161d45b6dc855490989f.tar.gz linux-3.10-ac8ab54a8e41a5ed0ee2161d45b6dc855490989f.tar.bz2 linux-3.10-ac8ab54a8e41a5ed0ee2161d45b6dc855490989f.zip |
sh: Bail out early on PCI resource conflicts.
Presently we just call in to request_resource() for the ioport and iomem
resources without checking for errors. This has already hidden a couple
of bugs, so add some error handling in for good measure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/drivers/pci/pci.c | 22 |
1 files changed, 9 insertions, 13 deletions
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 191075e91cd..82e59bc6210 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -53,8 +53,12 @@ static DEFINE_MUTEX(pci_scan_mutex); void __devinit register_pci_controller(struct pci_channel *hose) { - request_resource(&iomem_resource, hose->mem_resource); - request_resource(&ioport_resource, hose->io_resource); + if (request_resource(&iomem_resource, hose->mem_resource) < 0) + goto out; + if (request_resource(&ioport_resource, hose->io_resource) < 0) { + release_resource(hose->mem_resource); + goto out; + } *hose_tail = hose; hose_tail = &hose->next; @@ -76,6 +80,9 @@ void __devinit register_pci_controller(struct pci_channel *hose) pcibios_scanbus(hose); mutex_unlock(&pci_scan_mutex); } + +out: + printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n"); } static int __init pcibios_init(void) @@ -319,20 +326,9 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) if (flags & IORESOURCE_IO) return ioport_map_pci(dev, start, len); - - /* - * Presently the IORESOURCE_MEM case is a bit special, most - * SH7751 style PCI controllers have PCI memory at a fixed - * location in the address space where no remapping is desired. - * With the IORESOURCE_MEM case more care has to be taken - * to inhibit page table mapping for legacy cores, but this is - * punted off to __ioremap(). - * -- PFM. - */ if (flags & IORESOURCE_MEM) { if (flags & IORESOURCE_CACHEABLE) return ioremap(start, len); - return ioremap_nocache(start, len); } |