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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2008-05-29 22:05:07 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-06-16 15:14:48 +0100 |
| commit | 938b2b14172bd098972df2a5157bfabf161c90e5 (patch) | |
| tree | f50c7ee265327f6b29905e2c45ed12ecaa4b4492 | |
| parent | 1f34f2e4262bae8a1aa6d8fd6306b07074d33718 (diff) | |
| download | linux-3.10-938b2b14172bd098972df2a5157bfabf161c90e5.tar.gz linux-3.10-938b2b14172bd098972df2a5157bfabf161c90e5.tar.bz2 linux-3.10-938b2b14172bd098972df2a5157bfabf161c90e5.zip | |
[MIPS] Malta: Fix build errors for 64-bit kernels
Fix 64-bit Malta by using CKSEG0ADDR and correct casts.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/mips-boards/generic/amon.c | 4 | ||||
| -rw-r--r-- | include/asm-mips/gic.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/mips-boards/generic/amon.c b/arch/mips/mips-boards/generic/amon.c index b7633fda418..96236bf3383 100644 --- a/arch/mips/mips-boards/generic/amon.c +++ b/arch/mips/mips-boards/generic/amon.c @@ -28,7 +28,7 @@ int amon_cpu_avail(int cpu) { - struct cpulaunch *launch = (struct cpulaunch *)KSEG0ADDR(CPULAUNCH); + struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); if (cpu < 0 || cpu >= NCPULAUNCH) { pr_debug("avail: cpu%d is out of range\n", cpu); @@ -53,7 +53,7 @@ void amon_cpu_start(int cpu, unsigned long gp, unsigned long a0) { volatile struct cpulaunch *launch = - (struct cpulaunch *)KSEG0ADDR(CPULAUNCH); + (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); if (!amon_cpu_avail(cpu)) return; diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h index 3a492f225f0..954807d9d66 100644 --- a/include/asm-mips/gic.h +++ b/include/asm-mips/gic.h @@ -24,8 +24,8 @@ #define MSK(n) ((1 << (n)) - 1) #define REG32(addr) (*(volatile unsigned int *) (addr)) -#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS) -#define REGP(base, phys) REG32((unsigned int)(base) + (phys)) +#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) +#define REGP(base, phys) REG32((unsigned long)(base) + (phys)) /* Accessors */ #define GIC_REG(segment, offset) \ |