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| author | Chander Kashyap <chander.kashyap@linaro.org> | 2012-08-28 11:38:18 -0700 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-09-21 08:04:39 +0900 |
| commit | 1f926c4883590765004e003bbbefc668edd30dd5 (patch) | |
| tree | 085e2721c14ca80b9d61c3eb0e98f8306ac1519a | |
| parent | 5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff) | |
| download | linux-3.10-1f926c4883590765004e003bbbefc668edd30dd5.tar.gz linux-3.10-1f926c4883590765004e003bbbefc668edd30dd5.tar.bz2 linux-3.10-1f926c4883590765004e003bbbefc668edd30dd5.zip | |
ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers
The clocks for NAND, OneNAND and Transport Stream Interface(TSI)
controllers could be either enabled or disabled at boot. To ensure
that these are turned off until used, add them to the list of clocks
to be turned off during boot.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/mach-exynos/clock-exynos4.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index 2f51293c187..7cc5491e22b 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -501,6 +501,10 @@ static struct clk exynos4_init_clocks_off[] = { .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 3), }, { + .name = "tsi", + .enable = exynos4_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 4), + }, { .name = "hsmmc", .devname = "exynos4-sdhci.0", .parent = &exynos4_clk_aclk_133.clk, @@ -530,6 +534,14 @@ static struct clk exynos4_init_clocks_off[] = { .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), }, { + .name = "onenand", + .enable = exynos4_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 15), + }, { + .name = "nfcon", + .enable = exynos4_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 16), + }, { .name = "dac", .devname = "s5p-sdo", .enable = exynos4_clk_ip_tv_ctrl, |