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| author | Matthew Wilcox <matthew@wil.cx> | 2006-08-28 11:53:30 -0600 |
|---|---|---|
| committer | Matthew Wilcox <willy@parisc-linux.org> | 2006-10-04 06:47:03 -0600 |
| commit | 136ce40e9f1f24ca1dbf7714c669a7bca56440ea (patch) | |
| tree | c628ca029dc7f3829ebb52c403fba467b6faa804 | |
| parent | 75a4958154f5d0028d5464f2479b4297d55cf4a3 (diff) | |
| download | linux-3.10-136ce40e9f1f24ca1dbf7714c669a7bca56440ea.tar.gz linux-3.10-136ce40e9f1f24ca1dbf7714c669a7bca56440ea.tar.bz2 linux-3.10-136ce40e9f1f24ca1dbf7714c669a7bca56440ea.zip | |
[PARISC] Clean up asm-parisc/serial.h
Russell King pointed out that asm/serial.h is anachronistic and we were
misusing BASE_BAUD. So fix BASE_BAUD for PCI 16550 UARTs, move LASI_BASE_BAUD
into 8250_gsc, and fix the obsolete comment about reserving serial port slots.
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
| -rw-r--r-- | drivers/serial/8250_gsc.c | 4 | ||||
| -rw-r--r-- | include/asm-parisc/serial.h | 16 |
2 files changed, 4 insertions, 16 deletions
diff --git a/drivers/serial/8250_gsc.c b/drivers/serial/8250_gsc.c index 1ebe6b585d2..c5d0addfda4 100644 --- a/drivers/serial/8250_gsc.c +++ b/drivers/serial/8250_gsc.c @@ -22,7 +22,6 @@ #include <asm/hardware.h> #include <asm/parisc-device.h> #include <asm/io.h> -#include <asm/serial.h> /* for LASI_BASE_BAUD */ #include "8250.h" @@ -54,7 +53,8 @@ serial_init_chip(struct parisc_device *dev) memset(&port, 0, sizeof(port)); port.iotype = UPIO_MEM; - port.uartclk = LASI_BASE_BAUD * 16; + /* 7.272727MHz on Lasi. Assumed the same for Dino, Wax and Timi. */ + port.uartclk = 7272727; port.mapbase = address; port.membase = ioremap_nocache(address, 16); port.irq = dev->irq; diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h index 82fd820d684..d7e3cc60dbc 100644 --- a/include/asm-parisc/serial.h +++ b/include/asm-parisc/serial.h @@ -3,20 +3,8 @@ */ /* - * This assumes you have a 7.272727 MHz clock for your UART. - * The documentation implies a 40Mhz clock, and elsewhere a 7Mhz clock - * Clarified: 7.2727MHz on LASI. Not yet clarified for DINO + * This is used for 16550-compatible UARTs */ +#define BASE_BAUD ( 1843200 / 16 ) -#define LASI_BASE_BAUD ( 7272727 / 16 ) -#define BASE_BAUD LASI_BASE_BAUD - -/* - * We don't use the ISA probing code, so these entries are just to reserve - * space. Some example (maximal) configurations: - * - 712 w/ additional Lasi & RJ16 ports: 4 - * - J5k w/ PCI serial cards: 2 + 4 * card ~= 34 - * A500 w/ PCI serial cards: 5 + 4 * card ~= 17 - */ - #define SERIAL_PORT_DFNS |