diff options
author | Fei Yang <fei.yang@intel.com> | 2012-06-19 15:38:44 -0700 |
---|---|---|
committer | buildbot <buildbot@intel.com> | 2012-06-22 19:32:02 -0700 |
commit | 48f63cd4e23c19a9abda74ac34e893dea1cbf8d1 (patch) | |
tree | 9c8304f3077dbb835da4ed6771ac1adc70e26839 /arch | |
parent | 10020d08b2d5d9e010eaf77d165c30a3b35a0302 (diff) | |
download | kernel-mfld-blackbay-48f63cd4e23c19a9abda74ac34e893dea1cbf8d1.tar.gz kernel-mfld-blackbay-48f63cd4e23c19a9abda74ac34e893dea1cbf8d1.tar.bz2 kernel-mfld-blackbay-48f63cd4e23c19a9abda74ac34e893dea1cbf8d1.zip |
SPID: update kernel to match SPID spec v1.02
BZ: 42727
Also remove the OEMB table revision check as IA firmware supports
SPID for all hardware now.
Change-Id: I88c428db23765b662cd6ea933e9ab760daecb0ce
Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-on: http://android.intel.com:8080/53655
Reviewed-by: Gross, Mark <mark.gross@intel.com>
Tested-by: Ng, Cheon-woei <cheon-woei.ng@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/include/asm/intel-mid.h | 252 | ||||
-rw-r--r-- | arch/x86/platform/intel-mid/intel-mid.c | 46 |
2 files changed, 113 insertions, 185 deletions
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h index c1288d9819c..020cb920a09 100644 --- a/arch/x86/include/asm/intel-mid.h +++ b/arch/x86/include/asm/intel-mid.h @@ -182,7 +182,9 @@ enum { CUSTOMER_INTEL, CUSTOMER_AT, CUSTOMER_OR, - CUSTOMER_UNKNOWN + CUSTOMER_TK, + CUSTOMER_RSVD, + CUSTOMER_UNKNOWN = 0xFFFF }; /* Vendor_ID table */ @@ -190,15 +192,17 @@ enum { VENDOR_INTEL, VENDOR_LN, VENDOR_MO, - VENDOR_UNKNOWN + VENDOR_RSVD, + VENDOR_UNKNOWN = 0xFFFF }; /* Manufacturer_ID table for Vendor_ID == VENDOR_INTEL */ enum { - MANUFACTURER_FC_FAB1, - MANUFACTURER_FC_FAB2, - MANUFACTURER_INTEL_FAB1, - MANUFACTURER_UNKNOWN + MANUFACTURER_FC1, + MANUFACTURER_FC2, + MANUFACTURER_FC3, + MANUFACTURER_RSVD, + MANUFACTURER_UNKNOWN = 0xFFFF }; /* Platform_Family_ID table for Vendor_ID == VENDOR_INTEL */ @@ -209,7 +213,8 @@ enum { INTEL_CLVT_TABLET, INTEL_MRFL_PHONE, INTEL_MRFL_TABLET, - INTEL_PLATFORM_UNKNOWN + INTEL_PLATFORM_RSVD, + INTEL_PLATFORM_UNKNOWN = 0xFFFF }; /* Product_Line_ID table for Platform_Family_ID == INTEL_MFLD_PHONE */ @@ -231,6 +236,8 @@ enum { enum { INTEL_MFLDT_RR_PRO = 0x0000, INTEL_MFLDT_RR_ENG = 0x8000, + INTEL_MFLDT_JK_PRO = 0x0001, + INTEL_MFLDT_JK_ENG = 0x8001, INTEL_MFLDT_UNKNOWN = 0xFFFF }; @@ -262,169 +269,134 @@ enum { INTEL_MRFLT_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_BB15_PRO */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_BB15 */ enum { - MFLDP_BB15_PRO_PR33, /* CRAK D1 - 1.6GHz */ - MFLDP_BB15_PRO_UNKNOWN + MFLDP_BB15_PR20, /* CRAK C0 */ + MFLDP_BB15_PR31, /* CRAK D0 */ + MFLDP_BB15_PR32, /* CRAK D0 */ + MFLDP_BB15_PR33, /* CRAK D1 - 1.6GHz */ + MFLDP_BB15_PR34, /* CRAK D1 - 1.6GHz, alt eMMC, DDR2 */ + MFLDP_BB15_PR35, /* CRAK D1 - 1.6GHz, alt eMMC, DDR2 */ + MFLDP_BB15_PR36, /* CRAK D1 - 1.6GHz, alt eMMC, DDR2, MSIC C2 */ + MFLDP_BB15_PR40, /* CRAK D1 - 2.0GHz */ + MFLDP_BB15_PR2A, + MFLDP_BB15_PR3A, + MFLDP_BB15_PR3B, + MFLDP_BB15_4MVV, + MFLDP_BB15_4MSV, + MFLDP_BB15_ICDK, + MFLDP_BB15_RSVD, + MFLDP_BB15_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_BB15_ENG */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_BB20 */ enum { - MFLDP_BB15_ENG_PR20, /* CRAK C0 */ - MFLDP_BB15_ENG_PR31, /* CRAK D0 */ - MFLDP_BB15_ENG_PR32, /* CRAK D0 */ - MFLDP_BB15_ENG_PR33, /* CRAK D1 - 1.6GHz */ - MFLDP_BB15_ENG_PR34, /* CRAK D1 - 1.6GHz, alt eMMC, DDR2 */ - MFLDP_BB15_ENG_PR35, /* CRAK D1 - 1.6GHz, alt eMMC, DDR2 */ - MFLDP_BB15_ENG_PR36, /* CRAK D1 - 1.6GHz, alt eMMC, DDR2, MSIC C2 */ - MFLDP_BB15_ENG_PR40, /* CRAK D1 - 2.0GHz */ - MFLDP_BB15_ENG_UNKNOWN + MFLDP_BB20_TBD, + MFLDP_BB20_RSVD, + MFLDP_BB20_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_BB20_PRO */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_OR */ enum { - MFLDP_BB20_PRO_TBD, - MFLDP_BB20_PRO_UNKNOWN + MFLDP_OR_NHDV1, /* CRAK D0 */ + MFLDP_OR_NHDV2, /* CRAK D1 */ + MFLDP_OR_NHDV3, /* CRAK D1 */ + MFLDP_OR_NHDV31, /* CRAK D1 */ + MFLDP_OR_RSVD, + MFLDP_OR_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_BB20_ENG */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_AT */ enum { - MFLDP_BB20_ENG_TBD, - MFLDP_BB20_ENG_UNKNOWN + MFLDP_AT_LA, /* CAAK D1 */ + MFLDP_AT_LA_RSVD, + MFLDP_AT_LA_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_OR_PRO */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_LEX */ enum { - MFLDP_OR_PRO_NHDV30, /* CRAK D1 */ - MFLDP_OR_PRO_NHDV31, /* CRAK D1 */ - MFLDP_OR_PRO_UNKNOWN + MFLDP_LEX_PR11, /* RYS/PNW 1GHz CREK D1 */ + MFLDP_LEX_PR1M, /* RYS/PNW 1GHz CREK D1 */ + MFLDP_LEX_PR21, /* RYS/PNW 1GHz CSEK D1 */ + MFLDP_LEX_PR2M, /* RYS/PNW 1GHz CSEK D1 */ + MFLDP_LEX_PR30, /* RYS/PNW 1GHz CSEK D1 */ + MFLDP_LEX_RSVD, + MFLDP_LEX_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_OR_ENG */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDT_RR */ enum { - MFLDP_OR_ENG_NHDV1, /* CRAK D0 */ - MFLDP_OR_ENG_NHDV2, /* CRAK D1 */ - MFLDP_OR_ENG_UNKNOWN + MFLDT_RR_DV10, /* CRAK D0 */ + MFLDT_RR_DV15, /* CRAK D0/D1 */ + MFLDT_RR_DV20, /* CRAK D1 */ + MFLDT_RR_DV21, /* CRAK D1 */ + MFLDT_RR_RSVD, + MFLDT_RR_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_AT_PRO */ +/* Hardware_ID table for Product_Line_ID == INTEL_MFLDT_JK */ enum { - MFLDP_AT_PRO_LA, /* CAAK D1 */ - MFLDP_AT_PRO_UNKNOWN + MFLDT_JK_EV10, /* CRAK D0 */ + MFLDT_JK_EV20, /* CRAK D0 */ + MFLDT_JK_DV10, /* CRAK D1 */ + MFLDT_JK_RSVD, + MFLDT_JK_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_AT_ENG */ +/* Hardware_ID table for Product_Line_ID == INTEL_CLVTPP_RHB */ enum { - MFLDP_AT_ENG_LA, /* CAAK D1 */ - MFLDP_AT_ENG_UNKNOWN + CLVTPP_RHB_CCVV0, /* Clover City VV0 FAB A CLV/CLV+ A0*/ + CLVTPP_RHB_CCVV1, /* Clover City VV1 FAB B CLV+ A0*/ + CLVTPP_RHB_CCVV2, /* Clover City VV2 FAB C CLV+ A0*/ + CLVTPP_RHB_CLEV, /* Clover Lake CRB EV */ + CLVTPP_RHB_PR01, /* RHB PR0.1 CLV A0 C-CLASS */ + CLVTPP_RHB_PR02, /* RHB PR0.2 CLV A0 C-CLASS */ + CLVTPP_RHB_PMPR10, /* CLV+ A0 */ + CLVTPP_RHB_CCPVV1, /* Clover City Pre-VV1 Fab B CLV+ A0 */ + CLVTPP_RHB_PPR10, /* RHB Pre-PR1.0 CLV A0 C- CLASS */ + CLVTPP_RHB_MPR10, /* RHB Macro PR1.0 CLV+ A0 */ + CLVTPP_RHB_PR10, /* RHB PR1.0 CLV+ A0 C-CLASS */ + CLVTPP_RHB_MPR15, /* RHB Macro PR1.5 CLV+ A0 */ + CLVTPP_RHB_PR15, /* RHB PR1.5 CLV+ A0 C-CLASS */ + CLVTPP_RHB_MPR20, /* RHB Macro PR2.0 CLV+ B0 */ + CLVTPP_RHB_PR20, /* RHB PR2.0 CLV+ B0 C-CLASS */ + CLVTPP_RHB_MPR30, /* RHB Macro PR3.0 CLV+ B0 */ + CLVTPP_RHB_CCVV3, /* Clover City VV3 FAB D CLV+ A0 */ + CLVTPP_RHB_PR30, /* RHB PR3.0 CLV+ B0 C-CLASS */ + CLVTPP_RHB_DV1, /* RHB Dv1 */ + CLVTPP_RHB_RSVD, + CLVTPP_RHB_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_LEX_PRO */ -enum { - MFLDP_LEX_PRO_TBD, - MFLDP_LEX_PRO_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDP_LEX_ENG */ -enum { - MFLDP_LEX_ENG_PR11, /* RYS/PNW 1GHz CREK D1 */ - MFLDP_LEX_ENG_PR1M, /* RYS/PNW 1GHz CREK D1 */ - MFLDP_LEX_ENG_PR21, /* RYS/PNW 1GHz CSEK D1 */ - MFLDP_LEX_ENG_PR2M, /* RYS/PNW 1GHz CSEK D1 */ - MFLDP_LEX_ENG_PR30, /* RYS/PNW 1GHz CSEK D1 */ - MFLDP_LEX_ENG_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDT_RR_PRO */ -enum { - MFLDT_RR_PRO_DV21, /* CRAK D1 */ - MFLDT_RR_PRO_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_MFLDT_RR_ENG */ -enum { - MFLDT_RR_ENG_DV10, /* CRAK D0 */ - MFLDT_RR_ENG_DV15, /* CRAK D0/D1 */ - MFLDT_RR_ENG_DV20, /* CRAK D1 */ - MFLDT_RR_ENG_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_CLVTPP_RHB_PRO */ -enum { - CLVTPP_RHB_PRO_DV1, - CLVTPP_RHB_PRO_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_CLVTPP_RHB_ENG */ -enum { - CLVTPP_RHB_ENG_CCVVA, /* Clover City VV FAB A */ - CLVTPP_RHB_ENG_CCVVB, /* Clover City VV FAB B */ - CLVTPP_RHB_ENG_CCVVC, /* Clover City VV FAB C */ - CLVTPP_RHB_ENG_CLEV, /* Clover Lake CRB EV */ - CLVTPP_RHB_ENG_PR01, /* CLV A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PR02, /* CLV A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PMPR10, /* CLV A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PVV1, /* CLV A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PPR10, /* CLV A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_MPR10, /* CLV+ A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_VVPR10, /* CLV+ A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PR10, /* CLV+ A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_MPR15, /* CLV+ A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_VVPR15, /* CLV+ A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PR15, /* CLV+ A0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_MPR20, /* CLV+ B0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_VVPR20, /* CLV+ B0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PR20, /* CLV+ B0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_MPR30, /* CLV+ B0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_VVPR30, /* CLV+ B0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_PR30, /* CLV+ B0 ?FUSE CLASS? */ - CLVTPP_RHB_ENG_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_CLVTT_TBD_PRO */ -enum { - CLVTT_TBD_PRO_TBD, - CLVTT_TBD_PRO_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_CLVTT_TBD_ENG */ -enum { - CLVTT_TBD_ENG_CLEVA, /* Clover Lake EV - CRB - FAB A */ - CLVTT_TBD_ENG_CLEVB, /* Clover Lake EV - CRB - FAB B */ - CLVTT_TBD_ENG_CLEVC, /* Clover Lake EV - CRB - FAB C */ - CLVTT_TBD_ENG_CLEVD, /* Clover Lake EV - CRB - FAB D */ - CLVTT_TBD_ENG_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_MRFLP_TBD_PRO */ -enum { - MRFLP_TBD_PRO_TBD, - MRFLP_TBD_PRO_UNKNOWN -}; - -/* Hardware_ID table for Product_Line_ID == INTEL_MRFLP_TBD_ENG */ -enum { - MRFLP_TBD_ENG_SRVVA, /* SilverRidge VV FAB A */ - MRFLP_TBD_ENG_SRVVB, /* SilverRidge VV FAB B */ - MRFLP_TBD_ENG_SRVVC, /* SilverRidge VV FAB C */ - MRFLP_TBD_ENG_SRVVD, /* SilverRidge VV FAB D */ - MRFLP_TBD_ENG_SRSVA, /* SilverRidge VV FAB A */ - MRFLP_TBD_ENG_SRSVB, /* SilverRidge VV FAB B */ - MRFLP_TBD_ENG_SRSVC, /* SilverRidge VV FAB C */ - MRFLP_TBD_ENG_SRSVD, /* SilverRidge VV FAB D */ - MRFLP_TBD_ENG_UNKNOWN +/* Hardware_ID table for Product_Line_ID == INTEL_CLVTT_TBD */ +enum { + CLVTT_TBD_CLEVA, /* Clover Lake EV - CRB - FAB A */ + CLVTT_TBD_CLEVB, /* Clover Lake EV - CRB - FAB B */ + CLVTT_TBD_CLEVC, /* Clover Lake EV - CRB - FAB C */ + CLVTT_TBD_CLEVD, /* Clover Lake EV - CRB - FAB D */ + CLVTT_TBD_RSVD, + CLVTT_TBD_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MRFLT_TBD_PRO */ +/* Hardware_ID table for Product_Line_ID == INTEL_MRFLP_TBD */ enum { - MRFLT_TBD_PRO_TBD, - MRFLT_TBD_PRO_UNKNOWN + MRFLP_TBD_SRVVA, /* SilverRidge VV FAB A */ + MRFLP_TBD_SRVVB, /* SilverRidge VV FAB B */ + MRFLP_TBD_SRVVC, /* SilverRidge VV FAB C */ + MRFLP_TBD_SRVVD, /* SilverRidge VV FAB D */ + MRFLP_TBD_SRSVA, /* SilverRidge SV FAB A */ + MRFLP_TBD_SRSVB, /* SilverRidge SV FAB B */ + MRFLP_TBD_SRSVC, /* SilverRidge SV FAB C */ + MRFLP_TBD_SRSVD, /* SilverRidge SV FAB D */ + MRFLP_TBD_RSVD, + MRFLP_TBD_UNKNOWN = 0xFFFF }; -/* Hardware_ID table for Product_Line_ID == INTEL_MRFLT_TBD_ENG */ +/* Hardware_ID table for Product_Line_ID == INTEL_MRFLT_TBD */ enum { - MRFLT_TBD_ENG_TBD, - MRFLT_TBD_ENG_UNKNOWN + MRFLT_TBD_TBD, + MRFLT_TBD_RSVD, + MRFLT_TBD_UNKNOWN = 0xFFFF }; /* diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index 4c52bd747d5..d8395013e14 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -808,51 +808,7 @@ static int __init sfi_parse_oemb(struct sfi_table_header *table) board_id = oemb->board_id | (oemb->board_fab << 4); - /* SPID support starts from version 4, D0 Penwell based products - * will stay with old firmware, so we still have to use the - * deprecating board_id to identify these hardware */ - if (oemb->header.rev < 4) { - memset(spid.fru, 0, SPID_FRU_SIZE); - spid.customer_id = CUSTOMER_INTEL; - spid.vendor_id = VENDOR_INTEL; - spid.manufacturer_id = MANUFACTURER_INTEL_FAB1; - switch (board_id) { - case MFLD_BID_PR3: - spid.platform_family_id = INTEL_MFLD_PHONE; - spid.product_line_id = INTEL_MFLDP_BB15_ENG; - spid.hardware_id = MFLDP_BB15_ENG_PR31; - break; - case MFLD_BID_RR_DV10: - spid.platform_family_id = INTEL_MFLD_TABLET; - spid.product_line_id = INTEL_MFLDT_RR_ENG; - spid.hardware_id = MFLDT_RR_ENG_DV10; - break; - case MFLD_BID_RR_DV20: - spid.platform_family_id = INTEL_MFLD_TABLET; - spid.product_line_id = INTEL_MFLDT_RR_ENG; - spid.hardware_id = MFLDT_RR_ENG_DV20; - break; - case MFLD_BID_LEX: - spid.platform_family_id = INTEL_MFLD_PHONE; - spid.product_line_id = INTEL_MFLDP_LEX_ENG; - spid.hardware_id = MFLDP_LEX_ENG_PR11; - break; - case CLVT_BID_VV: - spid.platform_family_id = INTEL_CLVTP_PHONE; - spid.product_line_id = INTEL_CLVTPP_RHB_ENG; - spid.hardware_id = CLVTPP_RHB_ENG_CCVVA; - break; - case CLVT_BID_PR0: - spid.platform_family_id = INTEL_CLVTP_PHONE; - spid.product_line_id = INTEL_CLVTPP_RHB_ENG; - spid.hardware_id = CLVTPP_RHB_ENG_PR01; - break; - default: - memset(&spid, 0xff, sizeof(struct sfi_soft_platform_id)); - break; - } - } else - memcpy(&spid, &oemb->spid, sizeof(struct sfi_soft_platform_id)); + memcpy(&spid, &oemb->spid, sizeof(struct sfi_soft_platform_id)); snprintf(sig, (SFI_SIGNATURE_SIZE + 1), "%s", oemb->header.sig); |