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| author | Vasiliy Ulyanov <v.ulyanov@samsung.com> | 2014-04-03 15:09:07 +0400 |
|---|---|---|
| committer | Vasiliy Ulyanov <v.ulyanov@samsung.com> | 2014-04-07 09:18:15 +0400 |
| commit | 52d035822431856c0bca4163947d9da4d65c0caf (patch) | |
| tree | ee2c22c6a93a2b54cfb677734f1d59df37ec9315 /kprobe | |
| parent | 2d9d3e0c6534ce8a97f91ce31789bd42fc4c05b7 (diff) | |
| download | swap-modules-52d035822431856c0bca4163947d9da4d65c0caf.tar.gz swap-modules-52d035822431856c0bca4163947d9da4d65c0caf.tar.bz2 swap-modules-52d035822431856c0bca4163947d9da4d65c0caf.zip | |
[FIX] instrumentation for CLZ instruction
Change-Id: I7a980d4924030225dd2dedd5a0a817a7585813d6
Signed-off-by: Vasiliy Ulyanov <v.ulyanov@samsung.com>
Diffstat (limited to 'kprobe')
| -rw-r--r-- | kprobe/arch/asm-arm/dbi_kprobes.c | 7 | ||||
| -rw-r--r-- | kprobe/arch/asm-arm/dbi_kprobes.h | 4 |
2 files changed, 10 insertions, 1 deletions
diff --git a/kprobe/arch/asm-arm/dbi_kprobes.c b/kprobe/arch/asm-arm/dbi_kprobes.c index 0ae73082..d4edf4fe 100644 --- a/kprobe/arch/asm-arm/dbi_kprobes.c +++ b/kprobe/arch/asm-arm/dbi_kprobes.c @@ -224,8 +224,13 @@ int arch_make_trampoline_arm(unsigned long addr, unsigned long insn, return 0; uregs = pc_dep = 0; + /* Rm */ + if (ARM_INSN_MATCH(CLZ, insn)) { + uregs = 0xa; + if (ARM_INSN_REG_RM(insn) == 15) + pc_dep = 1; /* Rn, Rm ,Rd */ - if (ARM_INSN_MATCH(DPIS, insn) || ARM_INSN_MATCH(LRO, insn) || + } else if (ARM_INSN_MATCH(DPIS, insn) || ARM_INSN_MATCH(LRO, insn) || ARM_INSN_MATCH(SRO, insn)) { uregs = 0xb; if ((ARM_INSN_REG_RN(insn) == 15) || diff --git a/kprobe/arch/asm-arm/dbi_kprobes.h b/kprobe/arch/asm-arm/dbi_kprobes.h index 3ce451c1..704ad045 100644 --- a/kprobe/arch/asm-arm/dbi_kprobes.h +++ b/kprobe/arch/asm-arm/dbi_kprobes.h @@ -202,6 +202,10 @@ static inline void dbi_set_arg(struct pt_regs *regs, int num, unsigned long val) # define MASK_THUMB_INSN_BREAK 0xFF00 // 11111111xxxxxxxx # define PTRN_THUMB_INSN_BREAK 0xBE00 // 10111110xxxxxxxx +// CLZ +# define MASK_ARM_INSN_CLZ 0x0FFF0FF0 // xxxx111111111111xxxx11111111xxxx +# define PTRN_ARM_INSN_CLZ 0x016F0F10 // cccc000101101111xxxx11110001xxxx + // Data processing immediate shift # define MASK_ARM_INSN_DPIS 0x0E000010 # define PTRN_ARM_INSN_DPIS 0x00000000 |