diff options
-rw-r--r-- | INSTALL | 291 | ||||
-rw-r--r-- | configure.ac | 17 | ||||
-rw-r--r-- | libtbm-exynos4412.manifest | 5 | ||||
-rw-r--r-- | packaging/libtbm-exynos4412.spec | 12 | ||||
-rwxr-xr-x | src/tbm_bufmgr_exynos4412.c | 698 |
5 files changed, 953 insertions, 70 deletions
@@ -0,0 +1,291 @@ +Installation Instructions +************************* + +Copyright (C) 1994, 1995, 1996, 1999, 2000, 2001, 2002, 2004, 2005, +2006, 2007, 2008 Free Software Foundation, Inc. + + This file is free documentation; the Free Software Foundation gives +unlimited permission to copy, distribute and modify it. + +Basic Installation +================== + + Briefly, the shell commands `./configure; make; make install' should +configure, build, and install this package. The following +more-detailed instructions are generic; see the `README' file for +instructions specific to this package. + + The `configure' shell script attempts to guess correct values for +various system-dependent variables used during compilation. It uses +those values to create a `Makefile' in each directory of the package. +It may also create one or more `.h' files containing system-dependent +definitions. Finally, it creates a shell script `config.status' that +you can run in the future to recreate the current configuration, and a +file `config.log' containing compiler output (useful mainly for +debugging `configure'). + + It can also use an optional file (typically called `config.cache' +and enabled with `--cache-file=config.cache' or simply `-C') that saves +the results of its tests to speed up reconfiguring. Caching is +disabled by default to prevent problems with accidental use of stale +cache files. + + If you need to do unusual things to compile the package, please try +to figure out how `configure' could check whether to do them, and mail +diffs or instructions to the address given in the `README' so they can +be considered for the next release. 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Like +this: + + ./configure CC="gcc -arch i386 -arch x86_64 -arch ppc -arch ppc64" \ + CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \ + CPP="gcc -E" CXXCPP="g++ -E" + + This is not guaranteed to produce working output in all cases, you +may have to build one architecture at a time and combine the results +using the `lipo' tool if you have problems. + +Installation Names +================== + + By default, `make install' installs the package's commands under +`/usr/local/bin', include files under `/usr/local/include', etc. You +can specify an installation prefix other than `/usr/local' by giving +`configure' the option `--prefix=PREFIX'. + + You can specify separate installation prefixes for +architecture-specific files and architecture-independent files. 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If GNU CC is not installed, it is therefore recommended +to try + + ./configure CC="cc" + +and if that doesn't work, try + + ./configure CC="cc -nodtk" + +Specifying the System Type +========================== + + There may be some features `configure' cannot figure out +automatically, but needs to determine by the type of machine the package +will run on. Usually, assuming the package is built to be run on the +_same_ architectures, `configure' can figure that out, but if it prints +a message saying it cannot guess the machine type, give it the +`--build=TYPE' option. TYPE can either be a short name for the system +type, such as `sun4', or a canonical name which has the form: + + CPU-COMPANY-SYSTEM + +where SYSTEM can have one of these forms: + + OS KERNEL-OS + + See the file `config.sub' for the possible values of each field. If +`config.sub' isn't included in this package, then this package doesn't +need to know the machine type. + + If you are _building_ compiler tools for cross-compiling, you should +use the option `--target=TYPE' to select the type of system they will +produce code for. + + If you want to _use_ a cross compiler, that generates code for a +platform different from the build platform, you should specify the +"host" platform (i.e., that on which the generated programs will +eventually be run) with `--host=TYPE'. + +Sharing Defaults +================ + + If you want to set default values for `configure' scripts to share, +you can create a site shell script called `config.site' that gives +default values for variables like `CC', `cache_file', and `prefix'. +`configure' looks for `PREFIX/share/config.site' if it exists, then +`PREFIX/etc/config.site' if it exists. Or, you can set the +`CONFIG_SITE' environment variable to the location of the site script. +A warning: not all `configure' scripts look for a site script. + +Defining Variables +================== + + Variables not defined in a site shell script can be set in the +environment passed to `configure'. However, some packages may run +configure again during the build, and the customized values of these +variables may be lost. In order to avoid this problem, you should set +them in the `configure' command line, using `VAR=value'. For example: + + ./configure CC=/usr/local2/bin/gcc + +causes the specified `gcc' to be used as the C compiler (unless it is +overridden in the site shell script). + +Unfortunately, this technique does not work for `CONFIG_SHELL' due to +an Autoconf bug. Until the bug is fixed you can use this workaround: + + CONFIG_SHELL=/bin/bash /bin/bash ./configure CONFIG_SHELL=/bin/bash + +`configure' Invocation +====================== + + `configure' recognizes the following options to control how it +operates. + +`--help' +`-h' + Print a summary of all of the options to `configure', and exit. + +`--help=short' +`--help=recursive' + Print a summary of the options unique to this package's + `configure', and exit. The `short' variant lists options used + only in the top level, while the `recursive' variant lists options + also present in any nested packages. + +`--version' +`-V' + Print the version of Autoconf used to generate the `configure' + script, and exit. + +`--cache-file=FILE' + Enable the cache: use and save the results of the tests in FILE, + traditionally `config.cache'. FILE defaults to `/dev/null' to + disable caching. + +`--config-cache' +`-C' + Alias for `--cache-file=config.cache'. + +`--quiet' +`--silent' +`-q' + Do not print messages saying which checks are being made. To + suppress all normal output, redirect it to `/dev/null' (any error + messages will still be shown). + +`--srcdir=DIR' + Look for the package's source code in directory DIR. Usually + `configure' can determine that directory automatically. + +`--prefix=DIR' + Use DIR as the installation prefix. *Note Installation Names:: + for more details, including other options available for fine-tuning + the installation locations. + +`--no-create' +`-n' + Run the configure checks, but stop before creating any output + files. + +`configure' also accepts some other, not widely useful, options. Run +`configure --help' for more details. + diff --git a/configure.ac b/configure.ac index 56bba62..37b3f99 100644 --- a/configure.ac +++ b/configure.ac @@ -18,7 +18,7 @@ # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. AC_PREREQ(2.60) -AC_INIT(libtbm-exynos4412, 1.0.0) +AC_INIT(libtbm-exynos4412, 1.0.5) AC_USE_SYSTEM_EXTENSIONS AC_CONFIG_SRCDIR([Makefile.am]) AM_INIT_AUTOMAKE([dist-bzip2]) @@ -37,10 +37,21 @@ AC_FUNC_ALLOCA m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])]) PKG_CHECK_MODULES(LIBDRM, libdrm) +PKG_CHECK_MODULES(LIBDRM_EXYNOS, libdrm_exynos) PKG_CHECK_MODULES(LIBTBM, libtbm) +PKG_CHECK_MODULES(DLOG, dlog) -LIBTBM_EXYNOS4412_CFLAGS="$LIBDRM_CFLAGS $LIBTBM_CFLAGS " -LIBTBM_EXYNOS4412_LIBS="$LIBDRM_LIBS $LIBTBM_LIBS " +AC_ARG_ENABLE(cachectrl, + AS_HELP_STRING([--enable-cachectrl], + [Enable cache control (default: enable)]), + [CACHE_CTRL=$enableval], [CACHE_CTRL=yes]) + +if test "x$CACHE_CTRL" = xyes; then + AC_DEFINE(ENABLE_CACHECRTL, 1, [Enable cache control]) +fi + +LIBTBM_EXYNOS4412_CFLAGS="$LIBDRM_CFLAGS $LIBDRM_EXYNOS_CFLAGS $LIBTBM_CFLAGS $DLOG_CFLAGS " +LIBTBM_EXYNOS4412_LIBS="$LIBDRM_LIBS $LIBDRM_EXYNOS_LIBS $LIBTBM_LIBS $DLOG_LIBS " AC_SUBST(LIBTBM_EXYNOS4412_CFLAGS) AC_SUBST(LIBTBM_EXYNOS4412_LIBS) diff --git a/libtbm-exynos4412.manifest b/libtbm-exynos4412.manifest new file mode 100644 index 0000000..97e8c31 --- /dev/null +++ b/libtbm-exynos4412.manifest @@ -0,0 +1,5 @@ +<manifest> + <request> + <domain name="_"/> + </request> +</manifest> diff --git a/packaging/libtbm-exynos4412.spec b/packaging/libtbm-exynos4412.spec index d358c6e..19ec601 100644 --- a/packaging/libtbm-exynos4412.spec +++ b/packaging/libtbm-exynos4412.spec @@ -1,5 +1,5 @@ Name: libtbm-exynos4412 -Version: 1.0.5 +Version: 1.0.7 Release: 1 License: MIT Summary: Tizen Buffer Manager - exynos4412 backend @@ -9,20 +9,19 @@ Source0: %{name}-%{version}.tar.gz BuildRequires: pkgconfig(pthread-stubs) BuildRequires: pkgconfig(libdrm) +BuildRequires: pkgconfig(libdrm_exynos) BuildRequires: pkgconfig(libtbm) - -Requires: libtbm -Requires: libdrm2 +BuildRequires: pkgconfig(dlog) %description -descriptionion: ${summary} +descriptionion: Tizen Buffer manager backend module for exynos4412 %prep %setup -q %build -%reconfigure --prefix=%{_prefix} --libdir=%{_libdir}/bufmgr \ +%reconfigure --prefix=%{_prefix} --libdir=%{_libdir}/bufmgr --disable-cachectrl \ CFLAGS="${CFLAGS} -Wall -Werror" LDFLAGS="${LDFLAGS} -Wl,--hash-style=both -Wl,--as-needed" make %{?_smp_mflags} @@ -43,6 +42,7 @@ ln -s libtbm_exynos4412.so %{_libdir}/bufmgr/libtbm_default.so %postun -p /sbin/ldconfig %files +%manifest libtbm-exynos4412.manifest %{_libdir}/bufmgr/libtbm_*.so* /usr/share/license/%{name} diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c index 55dfb66..3c65e6b 100755 --- a/src/tbm_bufmgr_exynos4412.c +++ b/src/tbm_bufmgr_exynos4412.c @@ -46,20 +46,71 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include <xf86drm.h> #include <tbm_bufmgr.h> #include <tbm_bufmgr_backend.h> -#include "exynos_drm.h" +#include <exynos_drm.h> #include <pthread.h> +#include <tbm_surface.h> +#include <tbm_surface_internal.h> #define DEBUG #define USE_DMAIMPORT -#define TBM_EXYNOS4412_LOG(...) fprintf (stderr, __VA_ARGS__) +#define TBM_COLOR_FORMAT_COUNT 8 #ifdef DEBUG -static int bDebug = 0; -#define DBG(...) if(bDebug&0x1) TBM_EXYNOS4412_LOG (__VA_ARGS__) +#define LOG_TAG "TBM_BACKEND" +#include <dlog.h> +static int bDebug=0; + +char* target_name() +{ + FILE *f; + char *slash; + static int initialized = 0; + static char app_name[128]; + + if ( initialized ) + return app_name; + + /* get the application name */ + f = fopen("/proc/self/cmdline", "r"); + + if ( !f ) + { + return 0; + } + + memset(app_name, 0x00, sizeof(app_name)); + + if ( fgets(app_name, 100, f) == NULL ) + { + fclose(f); + return 0; + } + + fclose(f); + + if ( (slash=strrchr(app_name, '/')) != NULL ) + { + memmove(app_name, slash+1, strlen(slash)); + } + + initialized = 1; + + return app_name; +} +#define TBM_EXYNOS4412_LOG(fmt, args...) LOGE("\033[31m" "[%s]" fmt "\033[0m", target_name(), ##args) +#define DBG(fmt, args...) if(bDebug&01) LOGE("[%s]" fmt, target_name(), ##args) #else +#define TBM_EXYNOS4412_LOG(...) #define DBG(...) #endif +#define SIZE_ALIGN( value, base ) (((value) + ((base) - 1)) & ~((base) - 1)) + +#define TBM_SURFACE_ALIGNMENT_PLANE (64) +#define TBM_SURFACE_ALIGNMENT_PITCH_RGB (64) +#define TBM_SURFACE_ALIGNMENT_PITCH_YUV (16) + + /* check condition */ #define EXYNOS4412_RETURN_IF_FAIL(cond) {\ if (!(cond)) {\ @@ -160,6 +211,17 @@ char *STR_OPT[]= "RDWR" }; + +uint32_t tbm_exynos4412_color_format_list[TBM_COLOR_FORMAT_COUNT] = { TBM_FORMAT_RGBA8888, + TBM_FORMAT_BGRA8888, + TBM_FORMAT_RGBX8888, + TBM_FORMAT_RGB888, + TBM_FORMAT_NV12, + TBM_FORMAT_NV21, + TBM_FORMAT_YUV420, + TBM_FORMAT_YVU420 }; + + static unsigned int _get_exynos_flag_from_tbm (unsigned int ftbm) { @@ -249,9 +311,31 @@ _exynos4412_bo_handle (tbm_bo_exynos4412 bo_exynos4412, int device) bo_handle.ptr = (void *)bo_exynos4412->pBase; break; case TBM_DEVICE_3D: - TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " - "warning %s:%d(UMP not supported. Return DMABUF).\n", - getpid(), __FUNCTION__, __LINE__); +#ifdef USE_DMAIMPORT + if (bo_exynos4412->dmabuf) + { + bo_handle.u32 = (uint32_t)bo_exynos4412->dmabuf; + break; + } + + if (!bo_exynos4412->dmabuf) + { + struct drm_prime_handle arg = {0, }; + + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot dmabuf=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_bo_handle) NULL; + } + bo_exynos4412->dmabuf = arg.fd; + } + + bo_handle.u32 = (uint32_t)bo_exynos4412->dmabuf; +#endif + break; case TBM_DEVICE_MM: if (!bo_exynos4412->dmabuf) { @@ -284,6 +368,7 @@ _exynos4412_bo_handle (tbm_bo_exynos4412 bo_exynos4412, int device) static int _exynos4412_cache_flush (int fd, tbm_bo_exynos4412 bo_exynos4412, int flags) { +#ifdef ENABLE_CACHECRTL struct drm_exynos_gem_cache_op cache_op = {0, }; int ret; @@ -329,7 +414,11 @@ _exynos4412_cache_flush (int fd, tbm_bo_exynos4412 bo_exynos4412, int flags) getpid(), __FUNCTION__, __LINE__); return 0; } - +#else + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "warning %s:%d fail to enable the cache flush.\n", + getpid(), __FUNCTION__, __LINE__); +#endif return 1; } @@ -595,9 +684,9 @@ tbm_exynos4412_bo_import (tbm_bo bo, unsigned int key) getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); } - DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d), flags:%d(%d)\n", getpid(), + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d, %d), flags:%d(%d)\n", getpid(), __FUNCTION__, bo_exynos4412->size, - bo_exynos4412->gem, bo_exynos4412->name, + bo_exynos4412->gem, bo_exynos4412->name, bo_exynos4412->dmabuf, bo_exynos4412->flags_tbm, bo_exynos4412->flags_exynos); return (void *)bo_exynos4412; @@ -774,8 +863,15 @@ tbm_exynos4412_bo_lock(tbm_bo bo, int device, int opt) tbm_bufmgr_exynos4412 bufmgr_exynos4412; tbm_bo_exynos4412 bo_exynos4412; struct dma_buf_fence fence; + struct flock filelock; int ret=0; + if (device != TBM_DEVICE_3D && device != TBM_DEVICE_CPU) + { + DBG ("[libtbm-exynos4412:%d] %s not support device type,\n", getpid(), __FUNCTION__); + return 0; + } + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); @@ -787,27 +883,13 @@ tbm_exynos4412_bo_lock(tbm_bo bo, int device, int opt) /* Check if the given type is valid or not. */ if (opt & TBM_OPTION_WRITE) { - if (device == TBM_DEVICE_CPU) - fence.type = DMA_BUF_ACCESS_WRITE; - else if (device == TBM_DEVICE_3D) + if (device == TBM_DEVICE_3D) fence.type = DMA_BUF_ACCESS_WRITE | DMA_BUF_ACCESS_DMA; - else - { - DBG ("[libtbm-exynos4412:%d] %s GET_FENCE is ignored(device type is not 3D/CPU),\n", getpid(), __FUNCTION__); - return 0; - } } else if (opt & TBM_OPTION_READ) { - if (device == TBM_DEVICE_CPU) - fence.type = DMA_BUF_ACCESS_READ; - else if (device == TBM_DEVICE_3D) + if (device == TBM_DEVICE_3D) fence.type = DMA_BUF_ACCESS_READ | DMA_BUF_ACCESS_DMA; - else - { - DBG ("[libtbm-exynos4412:%d] %s GET_FENCE is ignored(device type is not 3D/CPU),\n", getpid(), __FUNCTION__); - return 0; - } } else { @@ -825,33 +907,57 @@ tbm_exynos4412_bo_lock(tbm_bo bo, int device, int opt) } - ret = ioctl(bo_exynos4412->dmabuf, DMABUF_IOCTL_GET_FENCE, &fence); - if (ret < 0) + if (device == TBM_DEVICE_3D) { - TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " - "error %s:%d Can not set GET FENCE(%s)\n", - getpid(), __FUNCTION__, __LINE__, strerror(errno) ); - return 0; + ret = ioctl(bo_exynos4412->dmabuf, DMABUF_IOCTL_GET_FENCE, &fence); + if (ret < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Can not set GET FENCE(%s)\n", + getpid(), __FUNCTION__, __LINE__, strerror(errno) ); + return 0; + } + } else + { + if (opt & TBM_OPTION_WRITE) + filelock.l_type = F_WRLCK; + else + filelock.l_type = F_RDLCK; + + filelock.l_whence = SEEK_CUR; + filelock.l_start = 0; + filelock.l_len = 0; + + if (-1 == fcntl(bo_exynos4412->dmabuf, F_SETLKW, &filelock)) + { + return 0; + } } pthread_mutex_lock(&bo_exynos4412->mutex); - int i; - for (i = 0; i < DMA_FENCE_LIST_MAX; i++) + + if (device == TBM_DEVICE_3D) { - if (bo_exynos4412->dma_fence[i].ctx == 0) + int i; + for (i = 0; i < DMA_FENCE_LIST_MAX; i++) { - bo_exynos4412->dma_fence[i].type = fence.type; - bo_exynos4412->dma_fence[i].ctx = fence.ctx; - break; + if (bo_exynos4412->dma_fence[i].ctx == 0) + { + bo_exynos4412->dma_fence[i].type = fence.type; + bo_exynos4412->dma_fence[i].ctx = fence.ctx; + break; + } + } + + if (i == DMA_FENCE_LIST_MAX) + { + //TODO: if dma_fence list is full, it needs realloc. I will fix this. by minseok3.kim + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fence list is full\n", + getpid(), __FUNCTION__, __LINE__); } } - if (i == DMA_FENCE_LIST_MAX) - { - //TODO: if dma_fence list is full, it needs realloc. I will fix this. by minseok3.kim - TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " - "error %s:%d fence list is full\n", - getpid(), __FUNCTION__, __LINE__); - } + pthread_mutex_unlock(&bo_exynos4412->mutex); DBG ("[libtbm-exynos4412:%d] %s DMABUF_IOCTL_GET_FENCE! flink_id=%d dmabuf=%d\n", getpid(), @@ -867,43 +973,66 @@ tbm_exynos4412_bo_unlock(tbm_bo bo) tbm_bo_exynos4412 bo_exynos4412; struct dma_buf_fence fence; + struct flock filelock; + unsigned int dma_type = 0; int ret=0; bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); - if (!bo_exynos4412->dma_fence[0].ctx) + if (bo_exynos4412->dma_fence[0].type & DMA_BUF_ACCESS_DMA) + dma_type = 1; + + if (!bo_exynos4412->dma_fence[0].ctx && dma_type) { DBG ("[libtbm-exynos4412:%d] %s FENCE not support or ignored,\n", getpid(), __FUNCTION__); return 0; } - if (!bo_exynos4412->dma_fence[0].type) + if (!bo_exynos4412->dma_fence[0].ctx && dma_type) { DBG ("[libtbm-exynos4412:%d] %s device type is not 3D/CPU,\n", getpid(), __FUNCTION__); return 0; } pthread_mutex_lock(&bo_exynos4412->mutex); - fence.type = bo_exynos4412->dma_fence[0].type; - fence.ctx = bo_exynos4412->dma_fence[0].ctx; - int i; - for (i = 1; i < DMA_FENCE_LIST_MAX; i++) + + if (dma_type) { - bo_exynos4412->dma_fence[i-1].type = bo_exynos4412->dma_fence[i].type; - bo_exynos4412->dma_fence[i-1].ctx = bo_exynos4412->dma_fence[i].ctx; + fence.type = bo_exynos4412->dma_fence[0].type; + fence.ctx = bo_exynos4412->dma_fence[0].ctx; + int i; + for (i = 1; i < DMA_FENCE_LIST_MAX; i++) + { + bo_exynos4412->dma_fence[i-1].type = bo_exynos4412->dma_fence[i].type; + bo_exynos4412->dma_fence[i-1].ctx = bo_exynos4412->dma_fence[i].ctx; + } + bo_exynos4412->dma_fence[DMA_FENCE_LIST_MAX-1].type = 0; + bo_exynos4412->dma_fence[DMA_FENCE_LIST_MAX-1].ctx = 0; } - bo_exynos4412->dma_fence[DMA_FENCE_LIST_MAX-1].type = 0; - bo_exynos4412->dma_fence[DMA_FENCE_LIST_MAX-1].ctx = 0; pthread_mutex_unlock(&bo_exynos4412->mutex); - ret = ioctl(bo_exynos4412->dmabuf, DMABUF_IOCTL_PUT_FENCE, &fence); - if (ret < 0) + if (dma_type) { - TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " - "error %s:%d Can not set PUT FENCE(%s)\n", - getpid(), __FUNCTION__, __LINE__, strerror(errno) ); - return 0; + ret = ioctl(bo_exynos4412->dmabuf, DMABUF_IOCTL_PUT_FENCE, &fence); + if (ret < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Can not set PUT FENCE(%s)\n", + getpid(), __FUNCTION__, __LINE__, strerror(errno) ); + return 0; + } + } else + { + filelock.l_type = F_UNLCK; + filelock.l_whence = SEEK_CUR; + filelock.l_start = 0; + filelock.l_len = 0; + + if (-1 == fcntl(bo_exynos4412->dmabuf, F_SETLKW, &filelock)) + { + return 0; + } } DBG ("[libtbm-exynos4412:%d] %s DMABUF_IOCTL_PUT_FENCE! flink_id=%d dmabuf=%d\n", getpid(), @@ -939,6 +1068,448 @@ tbm_exynos4412_bufmgr_deinit (void *priv) free (bufmgr_exynos4412); } +int +tbm_exynos4412_surface_supported_format(uint32_t **formats, uint32_t *num) +{ + uint32_t* color_formats=NULL; + + color_formats = (uint32_t*)calloc (1,sizeof(uint32_t)*TBM_COLOR_FORMAT_COUNT); + + if( color_formats == NULL ) + { + return 0; + } + memcpy( color_formats, tbm_exynos4412_color_format_list , sizeof(uint32_t)*TBM_COLOR_FORMAT_COUNT ); + + + *formats = color_formats; + *num = TBM_COLOR_FORMAT_COUNT; + + fprintf (stderr, "tbm_exynos4412_surface_supported_format count = %d \n",*num); + + return 1; +} + + +/** + * @brief get the plane data of the surface. + * @param[in] surface : the surface + * @param[in] width : the width of the surface + * @param[in] height : the height of the surface + * @param[in] format : the format of the surface + * @param[in] plane_idx : the format of the surface + * @param[out] size : the size of the plane + * @param[out] offset : the offset of the plane + * @param[out] pitch : the pitch of the plane + * @param[out] padding : the padding of the plane + * @return 1 if this function succeeds, otherwise 0. + */ +int +tbm_exynos4412_surface_get_plane_data(tbm_surface_h surface, int width, int height, tbm_format format, int plane_idx, uint32_t *size, uint32_t *offset, uint32_t *pitch) +{ + int ret = 1; + int bpp; + int _offset =0; + int _pitch =0; + int _size =0; + + + switch(format) + { + /* 16 bpp RGB */ + case TBM_FORMAT_XRGB4444: + case TBM_FORMAT_XBGR4444: + case TBM_FORMAT_RGBX4444: + case TBM_FORMAT_BGRX4444: + case TBM_FORMAT_ARGB4444: + case TBM_FORMAT_ABGR4444: + case TBM_FORMAT_RGBA4444: + case TBM_FORMAT_BGRA4444: + case TBM_FORMAT_XRGB1555: + case TBM_FORMAT_XBGR1555: + case TBM_FORMAT_RGBX5551: + case TBM_FORMAT_BGRX5551: + case TBM_FORMAT_ARGB1555: + case TBM_FORMAT_ABGR1555: + case TBM_FORMAT_RGBA5551: + case TBM_FORMAT_BGRA5551: + case TBM_FORMAT_RGB565: + bpp = 16; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 24 bpp RGB */ + case TBM_FORMAT_RGB888: + case TBM_FORMAT_BGR888: + bpp = 24; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 32 bpp RGB */ + case TBM_FORMAT_XRGB8888: + case TBM_FORMAT_XBGR8888: + case TBM_FORMAT_RGBX8888: + case TBM_FORMAT_BGRX8888: + case TBM_FORMAT_ARGB8888: + case TBM_FORMAT_ABGR8888: + case TBM_FORMAT_RGBA8888: + case TBM_FORMAT_BGRA8888: + bpp = 32; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + + /* packed YCbCr */ + case TBM_FORMAT_YUYV: + case TBM_FORMAT_YVYU: + case TBM_FORMAT_UYVY: + case TBM_FORMAT_VYUY: + case TBM_FORMAT_AYUV: + bpp = 32; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + + /* + * 2 plane YCbCr + * index 0 = Y plane, [7:0] Y + * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian + * or + * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian + */ + case TBM_FORMAT_NV12: + case TBM_FORMAT_NV21: + bpp = 12; + if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + else if( plane_idx ==1 ) + { + _offset = width*height; + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + + case TBM_FORMAT_NV16: + case TBM_FORMAT_NV61: + bpp = 16; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx ==1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + + /* + * 3 plane YCbCr + * index 0: Y plane, [7:0] Y + * index 1: Cb plane, [7:0] Cb + * index 2: Cr plane, [7:0] Cr + * or + * index 1: Cr plane, [7:0] Cr + * index 2: Cb plane, [7:0] Cb + */ + /* + NATIVE_BUFFER_FORMAT_YV12 + NATIVE_BUFFER_FORMAT_I420 + */ + case TBM_FORMAT_YUV410: + case TBM_FORMAT_YVU410: + bpp = 9; + break; + case TBM_FORMAT_YUV411: + case TBM_FORMAT_YVU411: + case TBM_FORMAT_YUV420: + case TBM_FORMAT_YVU420: + bpp = 12; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx == 1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 1) + break; + } + //else if (plane_idx == 2 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + case TBM_FORMAT_YUV422: + case TBM_FORMAT_YVU422: + bpp = 16; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx == 1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height),TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 1) + break; + } + //else if (plane_idx == 2 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + case TBM_FORMAT_YUV444: + case TBM_FORMAT_YVU444: + bpp = 24; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx == 1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 1) + break; + } + //else if (plane_idx == 2 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + default: + bpp = 0; + break; + } + + *size = _size; + *offset = _offset; + *pitch = _pitch; + + return ret; +} +/** +* @brief get the size of the surface with a format. +* @param[in] surface : the surface +* @param[in] width : the width of the surface +* @param[in] height : the height of the surface +* @param[in] format : the format of the surface +* @return size of the surface if this function succeeds, otherwise 0. +*/ + +int +tbm_exynos4412_surface_get_size(tbm_surface_h surface, int width, int height, tbm_format format) +{ + int ret = 0; + int bpp = 0; + int _pitch =0; + int _size =0; + int align =TBM_SURFACE_ALIGNMENT_PLANE; + + switch(format) + { + /* 16 bpp RGB */ + case TBM_FORMAT_XRGB4444: + case TBM_FORMAT_XBGR4444: + case TBM_FORMAT_RGBX4444: + case TBM_FORMAT_BGRX4444: + case TBM_FORMAT_ARGB4444: + case TBM_FORMAT_ABGR4444: + case TBM_FORMAT_RGBA4444: + case TBM_FORMAT_BGRA4444: + case TBM_FORMAT_XRGB1555: + case TBM_FORMAT_XBGR1555: + case TBM_FORMAT_RGBX5551: + case TBM_FORMAT_BGRX5551: + case TBM_FORMAT_ARGB1555: + case TBM_FORMAT_ABGR1555: + case TBM_FORMAT_RGBA5551: + case TBM_FORMAT_BGRA5551: + case TBM_FORMAT_RGB565: + bpp = 16; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 24 bpp RGB */ + case TBM_FORMAT_RGB888: + case TBM_FORMAT_BGR888: + bpp = 24; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 32 bpp RGB */ + case TBM_FORMAT_XRGB8888: + case TBM_FORMAT_XBGR8888: + case TBM_FORMAT_RGBX8888: + case TBM_FORMAT_BGRX8888: + case TBM_FORMAT_ARGB8888: + case TBM_FORMAT_ABGR8888: + case TBM_FORMAT_RGBA8888: + case TBM_FORMAT_BGRA8888: + bpp = 32; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* packed YCbCr */ + case TBM_FORMAT_YUYV: + case TBM_FORMAT_YVYU: + case TBM_FORMAT_UYVY: + case TBM_FORMAT_VYUY: + case TBM_FORMAT_AYUV: + bpp = 32; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* + * 2 plane YCbCr + * index 0 = Y plane, [7:0] Y + * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian + * or + * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian + */ + case TBM_FORMAT_NV12: + case TBM_FORMAT_NV21: + bpp = 12; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx ==1 + { + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + + break; + case TBM_FORMAT_NV16: + case TBM_FORMAT_NV61: + bpp = 16; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx ==1 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + + break; + /* + * 3 plane YCbCr + * index 0: Y plane, [7:0] Y + * index 1: Cb plane, [7:0] Cb + * index 2: Cr plane, [7:0] Cr + * or + * index 1: Cr plane, [7:0] Cr + * index 2: Cb plane, [7:0] Cb + */ + case TBM_FORMAT_YUV410: + case TBM_FORMAT_YVU410: + bpp = 9; + align = TBM_SURFACE_ALIGNMENT_PITCH_YUV; + break; + case TBM_FORMAT_YUV411: + case TBM_FORMAT_YVU411: + case TBM_FORMAT_YUV420: + case TBM_FORMAT_YVU420: + bpp = 12; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 1 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 2 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + + break; + case TBM_FORMAT_YUV422: + case TBM_FORMAT_YVU422: + bpp = 16; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 1 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 2 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + case TBM_FORMAT_YUV444: + case TBM_FORMAT_YVU444: + bpp = 24; + align = TBM_SURFACE_ALIGNMENT_PITCH_YUV; + break; + + default: + bpp = 0; + break; + } + + if(_size > 0) + ret = _size; + else + ret = SIZE_ALIGN( (width * height * bpp) >> 3, align); + + return ret; + +} + MODULEINITPPROTO (init_tbm_bufmgr_priv); static TBMModuleVersionInfo Exynos4412VersRec = @@ -995,6 +1566,8 @@ init_tbm_bufmgr_priv (tbm_bufmgr bufmgr, int fd) if (!bufmgr_backend) { TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] error: Fail to create drm!\n", getpid()); + if (bufmgr_exynos4412->hashBos) + drmHashDestroy (bufmgr_exynos4412->hashBos); free (bufmgr_exynos4412); return 0; } @@ -1011,6 +1584,9 @@ init_tbm_bufmgr_priv (tbm_bufmgr bufmgr, int fd) bufmgr_backend->bo_unmap = tbm_exynos4412_bo_unmap, bufmgr_backend->bo_cache_flush = tbm_exynos4412_bo_cache_flush, bufmgr_backend->bo_get_global_key = tbm_exynos4412_bo_get_global_key; + bufmgr_backend->surface_get_plane_data = tbm_exynos4412_surface_get_plane_data; + bufmgr_backend->surface_get_size = tbm_exynos4412_surface_get_size; + bufmgr_backend->surface_supported_format = tbm_exynos4412_surface_supported_format; if (bufmgr_exynos4412->use_dma_fence) { |