1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
|
/*
* Renesas SH7751R R2D-PLUS emulation
*
* Copyright (c) 2007 Magnus Damm
* Copyright (c) 2008 Paul Mundt
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "hw.h"
#include "sh.h"
#include "devices.h"
#include "sysemu.h"
#include "boards.h"
#define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
#define SDRAM_SIZE 0x04000000
#define SM501_VRAM_SIZE 0x800000
#define PA_POWOFF 0x30
#define PA_VERREG 0x32
#define PA_OUTPORT 0x36
typedef struct {
target_phys_addr_t base;
uint16_t bcr;
uint16_t irlmon;
uint16_t cfctl;
uint16_t cfpow;
uint16_t dispctl;
uint16_t sdmpow;
uint16_t rtcce;
uint16_t pcicd;
uint16_t voyagerrts;
uint16_t cfrst;
uint16_t admrts;
uint16_t extrst;
uint16_t cfcdintclr;
uint16_t keyctlclr;
uint16_t pad0;
uint16_t pad1;
uint16_t powoff;
uint16_t verreg;
uint16_t inport;
uint16_t outport;
uint16_t bverreg;
} r2d_fpga_t;
static uint32_t r2d_fpga_read(void *opaque, target_phys_addr_t addr)
{
r2d_fpga_t *s = opaque;
addr -= s->base;
switch (addr) {
case PA_OUTPORT:
return s->outport;
case PA_POWOFF:
return s->powoff;
case PA_VERREG:
return 0x10;
}
return 0;
}
static void
r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value)
{
r2d_fpga_t *s = opaque;
addr -= s->base;
switch (addr) {
case PA_OUTPORT:
s->outport = value;
break;
case PA_POWOFF:
s->powoff = value;
break;
case PA_VERREG:
/* Discard writes */
break;
}
}
static CPUReadMemoryFunc *r2d_fpga_readfn[] = {
r2d_fpga_read,
r2d_fpga_read,
NULL,
};
static CPUWriteMemoryFunc *r2d_fpga_writefn[] = {
r2d_fpga_write,
r2d_fpga_write,
NULL,
};
static void r2d_fpga_init(target_phys_addr_t base)
{
int iomemtype;
r2d_fpga_t *s;
s = qemu_mallocz(sizeof(r2d_fpga_t));
if (!s)
return;
s->base = base;
iomemtype = cpu_register_io_memory(0, r2d_fpga_readfn,
r2d_fpga_writefn, s);
cpu_register_physical_memory(base, 0x40, iomemtype);
}
static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
const char *boot_device, DisplayState * ds,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
CPUState *env;
struct SH7750State *s;
ram_addr_t sdram_addr, sm501_vga_ram_addr;
if (!cpu_model)
cpu_model = "SH7751R";
env = cpu_init(cpu_model);
if (!env) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
/* Allocate memory space */
sdram_addr = qemu_ram_alloc(SDRAM_SIZE);
cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, sdram_addr);
/* Register peripherals */
r2d_fpga_init(0x04000000);
s = sh7750_init(env);
sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE);
sm501_init(ds, 0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
serial_hds[2]);
/* Todo: register on board registers */
{
int kernel_size;
kernel_size = load_image(kernel_filename, phys_ram_base);
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
exit(1);
}
env->pc = SDRAM_BASE | 0xa0000000; /* Start from P2 area */
}
}
QEMUMachine r2d_machine = {
.name = "r2d",
.desc = "r2d-plus board",
.init = r2d_init,
.ram_require = (SDRAM_SIZE + SM501_VRAM_SIZE) | RAMSIZE_FIXED,
};
|
