1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
|
#ifndef QEMU_HW_MILKYMIST_H
#define QEMU_HW_MILKYMIST_H
#include "qdev.h"
#include "qdev-addr.h"
#include "net/net.h"
static inline DeviceState *milkymist_uart_create(hwaddr base,
qemu_irq irq)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-uart");
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
}
static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-hpdmc");
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
return dev;
}
static inline DeviceState *milkymist_memcard_create(hwaddr base)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-memcard");
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
return dev;
}
static inline DeviceState *milkymist_vgafb_create(hwaddr base,
uint32_t fb_offset, uint32_t fb_mask)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-vgafb");
qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
return dev;
}
static inline DeviceState *milkymist_sysctl_create(hwaddr base,
qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
uint32_t gpio_strappings)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-sysctl");
qdev_prop_set_uint32(dev, "frequency", freq_hz);
qdev_prop_set_uint32(dev, "systemid", system_id);
qdev_prop_set_uint32(dev, "capabilities", capabilities);
qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, gpio_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, timer0_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 2, timer1_irq);
return dev;
}
static inline DeviceState *milkymist_pfpu_create(hwaddr base,
qemu_irq irq)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-pfpu");
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
}
#ifdef CONFIG_OPENGL
#include <X11/Xlib.h>
#include <GL/glx.h>
static const int glx_fbconfig_attr[] = {
GLX_GREEN_SIZE, 5,
GLX_GREEN_SIZE, 6,
GLX_BLUE_SIZE, 5,
None
};
#endif
static inline DeviceState *milkymist_tmu2_create(hwaddr base,
qemu_irq irq)
{
#ifdef CONFIG_OPENGL
DeviceState *dev;
Display *d;
GLXFBConfig *configs;
int nelements;
int ver_major, ver_minor;
if (display_type == DT_NOGRAPHIC) {
return NULL;
}
/* check that GLX will work */
d = XOpenDisplay(NULL);
if (d == NULL) {
return NULL;
}
if (!glXQueryVersion(d, &ver_major, &ver_minor)) {
/* Yeah, sometimes getting the GLX version can fail.
* Isn't X beautiful? */
XCloseDisplay(d);
return NULL;
}
if ((ver_major < 1) || ((ver_major == 1) && (ver_minor < 3))) {
printf("Your GLX version is %d.%d,"
"but TMU emulation needs at least 1.3. TMU disabled.\n",
ver_major, ver_minor);
XCloseDisplay(d);
return NULL;
}
configs = glXChooseFBConfig(d, 0, glx_fbconfig_attr, &nelements);
if (configs == NULL) {
XCloseDisplay(d);
return NULL;
}
XFree(configs);
XCloseDisplay(d);
dev = qdev_create(NULL, "milkymist-tmu2");
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
#else
return NULL;
#endif
}
static inline DeviceState *milkymist_ac97_create(hwaddr base,
qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
qemu_irq dmaw_irq)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-ac97");
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, crrequest_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, crreply_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 2, dmar_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 3, dmaw_irq);
return dev;
}
static inline DeviceState *milkymist_minimac_create(hwaddr base,
qemu_irq rx_irq, qemu_irq tx_irq)
{
DeviceState *dev;
qemu_check_nic_model(&nd_table[0], "minimac");
dev = qdev_create(NULL, "milkymist-minimac");
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
return dev;
}
static inline DeviceState *milkymist_minimac2_create(hwaddr base,
hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
{
DeviceState *dev;
qemu_check_nic_model(&nd_table[0], "minimac2");
dev = qdev_create(NULL, "milkymist-minimac2");
qdev_prop_set_taddr(dev, "buffers_base", buffers_base);
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
return dev;
}
static inline DeviceState *milkymist_softusb_create(hwaddr base,
qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
uint32_t dmem_base, uint32_t dmem_size)
{
DeviceState *dev;
dev = qdev_create(NULL, "milkymist-softusb");
qdev_prop_set_uint32(dev, "pmem_base", pmem_base);
qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
qdev_prop_set_uint32(dev, "dmem_base", dmem_base);
qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
}
#endif /* QEMU_HW_MILKYMIST_H */
|
