From c1df8fb132eed31f3962b993e276c17f85ebbce9 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Thu, 18 Mar 2010 18:41:57 +0000 Subject: Replace assert(0) with abort() or cpu_abort() When building with -DNDEBUG, assert(0) will not stop execution so it must not be used for abnormal termination. Use cpu_abort() when in CPU context, abort() otherwise. Signed-off-by: Blue Swirl --- target-cris/helper.c | 2 +- target-cris/translate_v10.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-) (limited to 'target-cris') diff --git a/target-cris/helper.c b/target-cris/helper.c index fcdcf977fe..240bda056a 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -138,7 +138,7 @@ static void do_interruptv10(CPUState *env) break; case EXCP_BUSFAULT: - assert(0); + cpu_abort(env, "Unhandled busfault"); break; default: diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 564cdb009d..14e590da3c 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -285,7 +285,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc) default: LOG_DIS("pc=%x mode=%x quickimm %d r%d r%d\n", dc->pc, dc->mode, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled quickimm\n"); break; } return 2; @@ -594,7 +594,9 @@ static unsigned int dec10_reg(DisasContext *dc) case 4: tmp = 2; break; case 2: tmp = 1; break; case 1: tmp = 0; break; - default: assert(0); break; + default: + cpu_abort(dc->env, "Unhandled BIAP"); + break; } t = tcg_temp_new(); @@ -611,7 +613,7 @@ static unsigned int dec10_reg(DisasContext *dc) default: LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } } else { @@ -687,7 +689,7 @@ static unsigned int dec10_reg(DisasContext *dc) default: LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } } @@ -945,7 +947,7 @@ static int dec10_bdap_m(DisasContext *dc, int size) if (!dc->postinc && (dc->ir & (1 << 11))) { int simm = dc->ir & 0xff; - // assert(0); + /* cpu_abort(dc->env, "Unhandled opcode"); */ /* sign extended. */ simm = (int8_t)simm; @@ -1044,7 +1046,7 @@ static unsigned int dec10_ind(DisasContext *dc) default: LOG_DIS("pc=%x var-ind.%d %d r%d r%d\n", dc->pc, size, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } return insn_len; @@ -1136,7 +1138,7 @@ static unsigned int dec10_ind(DisasContext *dc) break; default: LOG_DIS("ERROR pc=%x opcode=%d\n", dc->pc, dc->opcode); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } -- cgit v1.2.3