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2014-12-17Merge remote-tracking branch 'remotes/xtensa/tags/20141217-xtensa' into stagingPeter Maydell1-0/+5
Xtensa updates for 2.3: - fix cross-page opcode handling; - move window overflow exception generation decision to translation phase; - don't generate dead code after privilege, window overflow or coprocessor exception; - add monitor command 'info opcount' for dumping TCG opcode counters. # gpg: Signature made Wed 17 Dec 2014 02:57:01 GMT using RSA key ID F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" * remotes/xtensa/tags/20141217-xtensa: target-xtensa: don't generate dead code target-xtensa: record available window in TB flags target-xtensa: test cross-page opcode target-xtensa: fix translation for opcodes crossing page boundary tcg: add separate monitor command to dump opcode counters Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-12-17tcg: add separate monitor command to dump opcode countersMax Filippov1-0/+5
Currently 'info jit' outputs half of the information to monitor and the rest to qemu log. Dumping opcode counts to monitor as a part of 'info jit' command doesn't sound useful. Add new monitor command 'info opcount' that only dumps opcode counters. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2014-12-16target-mips: Correct MIPS16/microMIPS branch size calculationMaciej W. Rozycki1-1/+1
Correct MIPS16/microMIPS branch size calculation in PC adjustment needed: - to set the value of CP0.ErrorEPC at the entry to the reset exception, - for the purpose of branch reexecution in the context of device I/O. Follow the approach taken in `exception_resume_pc' for ordinary, Debug and NMI exceptions. MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has to be reflected in calculation. Original MIPS ISA branches, which is where this code originates from, are always 4 bytes long, just as all original MIPS ISA instructions. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-12-15cpu-exec: invalidate nocache translation if they are interruptedPavel Dovgalyuk1-0/+6
In this case, QEMU might longjmp out of cpu-exec.c and miss the final cleanup in cpu_exec_nocache. Do this manually through a new compile flag. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-10-06translate-all.c: memory walker initial address miscalculationMikhail Ilyin1-17/+16
The initial base address is miscalculated in walk_memory_regions(). It has to be shifted TARGET_PAGE_BITS more. Holder variables are extended to target_ulong size otherwise they don't fit for MIPS N32 (a 32-bit ABI with a 64-bit address space) and qemu won't compile. The issue led to incorrect debug output of memory maps and a mis-formed coredumped file. Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-12trace: add some tcg tracing supportAlex Bennée1-0/+3
This adds a couple of tcg specific trace-events which are useful for tracing execution though tcg generated blocks. It's been tested with lttng user space tracing but is generic enough for all systems. The tcg events are: * translate_block - when a subject block is translated * exec_tb - when a translated block is entered * exec_tb_exit - when we exit the translated code * exec_tb_nocache - special case translations Of course we can only trace the entrance to the first block of a chain as each block will jump directly to the next when it can. See the -d nochain patch to allow more complete tracing at the expense of performance. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-24Fix new typos (found by codespell)Stefan Weil1-1/+1
* accomodate -> accommodate * aquiring -> acquiring * beacuse -> because * loosing -> losing * prefering -> preferring * threshhold -> threshold Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-19memory: move preallocation code out of exec.cPaolo Bonzini1-7/+0
So that backends can use it. Since we need the page size for efficiency, move code to compute it out of translate-all.c and into util/oslib-win32.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-05-24tcg-mips: Constrain the code_gen_buffer to be within one 256mb segmentRichard Henderson1-5/+85
This assures us use of J for exit_tb and goto_tb, and JAL for calling into the generated bswap helpers. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Layout executable and code_gen_bufferRichard Henderson1-0/+13
Choosing good addresses for them means we can use JAL for helper calls. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Define tcg_insn_unit for code pointersRichard Henderson1-7/+6
To be defined by the tcg backend based on the elemental unit of the ISA. During the transition, allow TCG_TARGET_INSN_UNIT_SIZE to be undefined, which allows us to default tcg_insn_unit to the current uint8_t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-04page_check_range: don't bail out early after unprotecting pageAndrei Warkentin1-1/+0
When checking a page range, if we found that a page was made read-only by QEMU because it contained translated code, we were incorrectly returning immediately after unprotecting that page, rather than continuing to check the entire range, so we might fail to unprotect pages later in the range, or might incorrectly return a "success" result even if later pages were not writable. In particular, this could cause segfaults in a case where signals are delivered back to back on a target architecture which uses trampoline code in the stack frame (as AArch64 currently does). The second signal causes a segfault because the frame cannot be written to (it was protected because we translated and executed the restorer trampoline, and the unprotect logic did not unprotect the whole range). Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com [PMM: expanded commit message a bit] Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-8/+8
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cputlb: Change tlb_unprotect_code_phys() argument to CPUStateAndreas Färber1-3/+3
Note that the argument is unused. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber1-3/+3
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change tb_flush_jmp_cache() argument to CPUStateAndreas Färber1-2/+1
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change tb_gen_code() argument to CPUStateAndreas Färber1-4/+5
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change cpu_io_recompile() argument to CPUStateAndreas Färber1-2/+2
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change tb_check_watchpoint() argument to CPUStateAndreas Färber1-2/+2
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change cpu_restore_state_from_tb() argument to CPUStateAndreas Färber1-8/+7
And normalize the argument order. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber1-1/+2
This lets us drop some local variables in tlb_fill() functions. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move tb_jmp_cache field from CPU_COMMON to CPUStateAndreas Färber1-9/+6
Clear it on reset. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move icount_decr field from CPU_COMMON to CPUStateAndreas Färber1-7/+8
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move can_do_io field from CPU_COMMON to CPUStateAndreas Färber1-2/+3
Rename can_do_io() to cpu_can_do_io() and change argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move mem_io_{pc,vaddr} fields from CPU_COMMON to CPUStateAndreas Färber1-7/+8
Reset them. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-11exec: Make tb_invalidate_phys_addr input an ASEdgar E. Iglesias1-2/+2
No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-01-17kvm: initialize qemu_host_page_sizeAlexey Kardashevskiy1-6/+8
There is a HOST_PAGE_ALIGN macro which makes sense for KVM accelerator but it uses qemu_host_page_size/qemu_host_page_mask which initialized for TCG only. This moves qemu_host_page_size/qemu_host_page_mask initialization from TCG's page_init() and adds a call for it from kvm_init(). Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2013-12-23cputlb: Tidy memset() of arraysRichard Henderson1-3/+2
Don't duplicate the array length computation in the memset() when plain sizeof() can produce the correct results. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-10split definitions for exec.c and translate-all.c radix treesPaolo Bonzini1-14/+18
The exec.c and translate-all.c radix trees are quite different, and the exec.c one in particular is not limited to the CPU---it can be used also by devices that do DMA, and in that case the address space is not limited to TARGET_PHYS_ADDR_SPACE_BITS bits. We want to make exec.c's radix trees 64-bit wide. As a first step, stop sharing the constants between exec.c and translate-all.c. exec.c gets P_L2_* constants, translate-all.c gets V_L2_*, for consistency with the existing V_L1_* symbols. Though actually in the softmmu case translate-all.c is also indexed by physical addresses... This patch has no semantic change. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-10exec: Delete is_tcg_gen_code and GETRA_EXTRichard Henderson1-12/+0
All implementations now boil down to GETRA. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-20translate-all: Fix formatting of dump outputStefan Weil1-2/+3
The page dump writes a table with 3 abi_ulong values in each row. These values take 8 or 16 characters (depending on sizeof abi_ulong). Fix the table headings to be aligned with the table columns. old: start end size prot 0000000120000000-000000012021e000 000000000021e000 rwx 0000004000000000-0000004000002000 0000000000002000 --- 0000004000002000-0000004000802000 0000000000800000 rw- new: start end size prot 0000000120000000-000000012021e000 000000000021e000 rwx 0000004000000000-0000004000002000 0000000000002000 --- 0000004000002000-0000004000802000 0000000000800000 rw- Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-09-03cpu: Use QTAILQ for CPU listAndreas Färber1-2/+2
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23linux-user: Unlock mmap_lock when resuming guest from page_unprotectAlexander Graf1-3/+7
The page_unprotect() function is running everything locked. Before every potential exit path of the function mmap_unlock() gets called to make sure we don't leak the lock. However, the function calls tb_invalidate_phys_page() which again can exit a signal through longjmp, leaving our mmap_unlock() attempts in vain. Add a hint to tb_invalidate_phys_page() that we need to unlock before we can leave back into guest context, so that we don't leak the lock. This fixes 16-bit i386 wine programs running in linux-user for me. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2013-07-09cpu: Make first_cpu and next_cpu CPUStateAndreas Färber1-4/+8
Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber1-8/+12
Move it to qom/cpu.h. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-20exec: return MemoryRegion from address_space_translatePaolo Bonzini1-5/+5
Only address_space_translate_for_iotlb needs to return the section. Every caller of address_space_translate now uses only section->mr, return it directly. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-12tcg/aarch64: implement new TCG target for aarch64Claudio Fontana1-0/+2
add preliminary support for TCG target aarch64. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 51A5C596.3090108@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-05-29memory: add address_space_translatePaolo Bonzini1-3/+3
Using phys_page_find to translate an AddressSpace to a MemoryRegionSection is unwieldy. It requires to pass the page index rather than the address, and later memory_region_section_addr has to be called. Replace memory_region_section_addr with a function that does all of it: call phys_page_find, compute the offset within the region, and check how big the current mapping is. This way, a large flat region can be written with a single lookup rather than a page at a time. address_space_translate will also provide a single point where IOMMU forwarding is implemented. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-05-24Merge remote-tracking branch 'bonzini/iommu-for-anthony' into stagingAnthony Liguori1-1/+1
# By Paolo Bonzini (11) and others # Via Paolo Bonzini * bonzini/iommu-for-anthony: memory: clean up phys_page_find memory: populate FlatView for new address spaces memory: limit sections in the radix tree to the actual address space size s390x: reduce TARGET_PHYS_ADDR_SPACE_BITS to 62 memory: fix address space initialization/destruction memory: make memory_global_sync_dirty_bitmap take an AddressSpace memory: do not duplicate memory_region_destructor_none memory: Rename readable flag to romd_mode memory: Replace open-coded memory_region_is_romd memory: allow memory_region_find() to run on non-root memory regions memory: assert that PhysPageEntry's ptr does not overflow exec: eliminate stq_phys_notdirty exec: make qemu_get_ram_ptr private exec: eliminate qemu_put_ram_ptr exec: remove obsolete comment Message-id: 1369414987-8839-1-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-24memory: Replace open-coded memory_region_is_romdJan Kiszka1-1/+1
Improves readability. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2013-05-18translate: remove redundantly included qemu/timer.hliguang1-1/+0
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-By: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-04-26PPC: Fix compile with profiling enabledAlexander Graf1-0/+1
When using profiling, we rely on profile_getclock() being available at our disposal. Somehow that function got moved from an indirect include we used to have in translate-init.c, so that we were now left not properly compiling anymore. Add an explicit include to timer.h which defines profile_getclock, so that we can compile again. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-22translate-all: fix compiler warning and linked errorAlexey Kardashevskiy1-0/+1
The code did use profile_getclock() but did not include include/qemu/timer.h where this function is defined. The patch fixes this. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1366616571-4321-1-git-send-email-aik@ozlabs.ru Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15include: avoid useless includes of exec/ headersPaolo Bonzini1-3/+2
Headers in include/exec/ are for the deepest innards of QEMU, they should almost never be included directly. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-22tcg: Fix occasional TCG broken problem when ldst optimization enabledYeongkyoon Lee1-2/+2
is_tcg_gen_code() checks the upper limit of TCG generated code range wrong, so that TCG could get broken occasionally only when CONFIG_QEMU_LDST_OPTIMIZATION enabled. The reason is code_gen_buffer_max_size does not cover the upper range up to (TCG_MAX_OP_SIZE * OPC_BUF_SIZE), thus code_gen_buffer_max_size should be modified to code_gen_buffer_size. CC: qemu-stable@nongnu.org Signed-off-by: Yeongkyoon Lee <yeongkyoon.lee@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-03-12cpu: Pass CPUState to cpu_interrupt()Andreas Färber1-7/+5
Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-5/+5
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-03translate-all.c: Remove cpu_unlink_tb()Peter Maydell1-69/+0
The (unsafe) function cpu_unlink_tb() is now unused, so we can simply remove it and any code that was only used by it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-03Handle CPU interrupts by inline checking of a flagPeter Maydell1-2/+2
Fix some of the nasty TCG race conditions and crashes by implementing cpu_exit() as setting a flag which is checked at the start of each TB. This avoids crashes if a thread or signal handler calls cpu_exit() while the execution thread is itself modifying the TB graph (which may happen in system emulation mode as well as in linux-user mode with a multithreaded guest binary). This fixes the crashes seen in LP:668799; however there are another class of crashes described in LP:1098729 which stem from the fact that in linux-user with a multithreaded guest all threads will use and modify the same global TCG date structures (including the generated code buffer) without any kind of locking. This means that multithreaded guest binaries are still in the "unsupported" category. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16cputlb: Pass CPUState to cpu_unlink_tb()Andreas Färber1-4/+5
CPUArchState is no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de>
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