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2014-05-14tcg: Fix tcg_reg_alloc_mov vs no-op truncationRichard Henderson1-8/+11
Commit af3cbfbe8018ccc16fb3a0048e928f66f0d05e87 hoisted some "common" loads of the temporary type, forgetting that the types could differ during truncating moves. This affects the correctness of the memory offset on big-endian hosts. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson11-245/+49
The INDEX_op_call case has just been obsoleted; the mov and movi cases have not been reachable for years. Attempt to document this both in each tcg_out_op switch, and via TCG_OPF_NOT_PRESENT. Because of the TCG_OPF_NOT_PRESENT change, this must be done for all targets in a single commit. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Use tcg_target_available_regs in tcg_reg_alloc_movRichard Henderson1-9/+10
The move opcodes are special in that their constraints must cover all available registers. So instead of checking the constraints, just use the available registers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Make call address a constant parameterRichard Henderson5-152/+72
Avoid allocating a tcg temporary to hold the constant address, and instead place it directly into the op_call arguments. At the same time, convert to the newly introduced tcg_out_call backend function, rather than invoking tcg_out_op for the call. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tci: Create tcg_out_callRichard Henderson1-0/+5
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-mips: Split out tcg_out_callRichard Henderson1-8/+10
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-sparc: Create tcg_out_callRichard Henderson1-8/+14
Rename the existing tcg_out_calli to tcg_out_call_nodelay. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-ppc64: Rename tcg_out_calli to tcg_out_callRichard Henderson1-21/+16
Merge the existing tcg_out_call into tcg_out_op. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-ppc: Split out tcg_out_callRichard Henderson1-3/+8
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-s390: Rename tgen_calli to tcg_out_callRichard Henderson1-4/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-i386: Rename tcg_out_calli to tcg_out_callRichard Henderson1-3/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Require TCG_TARGET_INSN_UNIT_SIZERichard Henderson1-3/+2
Now that all backends do define TCG_TARGET_INSN_UNIT_SIZE, remove the fallback definition. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tci: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-6/+14
And use tcg pointer differencing functions as appropriate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-mips: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-80/+37
And use tcg pointer differencing functions as appropriate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-ia64: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-145/+78
Using a 16-byte aligned structure achieves best results, both for code cleanliness and compiled code size. However, this means that we can't use the trick of encoding the slot number into the low 2 bits. Thankfully, we only ever use slot2, so make that explicit in the names of the relocation functions, and drop the code for other slots. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-s390: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-48/+45
And use tcg pointer differencing functions as appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-aarch64: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-69/+53
And use tcg pointer differencing functions as appropriate. Acked-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-arm: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-96/+55
And use tcg pointer differencing functions as appropriate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-sparc: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-69/+60
And use tcg pointer differencing functions as appropriate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-ppc: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-102/+94
And use tcg pointer differencing functions as appropriate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-ppc64: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-84/+81
And use tcg pointer differencing functions as appropriate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg-i386: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-24/+26
And use tcg pointer differencing functions as appropriate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Define tcg_insn_unit for code pointersRichard Henderson3-48/+100
To be defined by the tcg backend based on the elemental unit of the ISA. During the transition, allow TCG_TARGET_INSN_UNIT_SIZE to be undefined, which allows us to default tcg_insn_unit to the current uint8_t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Introduce byte pointer arithmetic helpersRichard Henderson1-0/+45
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Avoid undefined behaviour patching code at unaligned addressesPeter Maydell2-6/+26
To avoid C undefined behaviour when patching generated code, provide wrappers tcg_patch8/16/32/64 which use the usual memcpy trick, and use them in the i386 backend. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12tcg: Avoid stores to unaligned addressesPeter Maydell1-3/+3
Avoid stores to unaligned addresses in TCG code generation, by using the usual memcpy() approach. (Using bswap.h would drag a lot of QEMU baggage into TCG, so it's simpler just to do direct memcpy() here.) Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Accept stores of zeroRichard Henderson1-2/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Fix small 32-bit moviRichard Henderson1-0/+5
We tested imm13 before discarding garbage high bits. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Fixup function argument typesRichard Henderson1-66/+51
Use TCGReg everywhere appropriate. Use int32_t for all arguments that may be registers or immediate constants. Merge tcg_out_addi into its only caller. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Hoist common argument loads in tcg_out_opRichard Henderson1-63/+60
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Don't handle mov/movi in tcg_out_opRichard Henderson1-7/+6
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Tidy check_fit_* testsRichard Henderson1-15/+20
Use sextract instead of raw bit shifting for the tests. Introduce a new check_fit_ptr macro to make it clear we're looking at pointers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Implement muls2_i32Richard Henderson2-4/+16
Using the 32-bit SMUL is a tad more efficient than resorting to extending and using the 64-bit MULX. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Use the RETURN instructionRichard Henderson1-4/+10
Saves one insn per TB exit over JMPL+RESTORE. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Use 64-bit registers with sparcv8plusRichard Henderson3-361/+258
Quite a lot of effort was spent composing and decomposing 64-bit quantities in registers, when we should just create them and leave them as one 64-bit register. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Support trunc_shr_i32Richard Henderson2-1/+9
Unlike a 64-bit shift op, allows the output to be in %l or %i registers for sparcv8plus. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Remove most uses of TCG_TARGET_REG_BITSRichard Henderson1-33/+37
Replace with SPARC64 define. Soon even sparcv8plus will use 64-bit register as far as TCG is concerned. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson12-16/+67
Let the backend do something special for truncation. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changesRichard Henderson1-2/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-24Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20140422' into stagingPeter Maydell25-157/+160
Pull tcg 2014-04-22 # gpg: Signature made Tue 22 Apr 2014 22:00:04 BST using RSA key ID 4DD0279B # gpg: Can't check signature: public key not found * remotes/rth/tags/tcg-next-20140422: tcg: Use HOST_WORDS_BIGENDIAN tcg: Fix fallback from muls2_i64 to mulu2_i64 tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32 tcg: Relax requirement for mulu2_i32 on 32-bit hosts tcg-s390: Remove W constraint tcg-sparc: Use the type parameter to tcg_target_const_match tcg-ppc64: Use the type parameter to tcg_target_const_match tcg-aarch64: Remove w constraint tcg: Add TCGType parameter to tcg_target_const_match tcg: Fix out of range shift in deposit optimizations tci: Mask shift counts to avoid undefined behavior tcg: Mask shift quantities while folding tcg: Use "unspecified behavior" for shifts tcg: Fix warning (1 bit signed bitfield entry) and replace int by bool Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson12-32/+12
Instead of rolling a local TCG_TARGET_WORDS_BIGENDIAN. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Fix fallback from muls2_i64 to mulu2_i64Richard Henderson1-20/+18
Brown Bag sez, don't put the fallback code into the wrong function. Also, check for muluh_i64 and use tcg_gen_mulu2_i64 instead of raw ops. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32Richard Henderson1-4/+2
Rather than hard-coding use of mulu2_i32, allow muluh_i32. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Relax requirement for mulu2_i32 on 32-bit hostsRichard Henderson5-1/+12
Instead require either mulu2_i32 or muluh_i32. The code in tcg-op.h already supports looking for both. Previous incomplete conversion? Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg-s390: Remove W constraintRichard Henderson1-24/+19
Now redundant with the type parameter to tcg_target_const_match. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg-sparc: Use the type parameter to tcg_target_const_matchRichard Henderson1-1/+7
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg-ppc64: Use the type parameter to tcg_target_const_matchRichard Henderson1-1/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg-aarch64: Remove w constraintRichard Henderson1-22/+18
Now redundant with the type parameter to tcg_target_const_match. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson11-13/+13
Most 64-bit targets need to be able to ignore the high bits of a TCG_TYPE_I32 value. Suggested-by: Stuart Brady <sdb@zubnet.me.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Fix out of range shift in deposit optimizationsRichard Henderson1-6/+4
By inspection, for a deposit(x, y, 0, 64), we'd have a shift of (1<<64) and everything else falls apart. But we can reuse the existing deposit logic to get this right. Signed-off-by: Richard Henderson <rth@twiddle.net>
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