index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
tcg
/
ppc64
Age
Commit message (
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Author
Files
Lines
2012-03-29
qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defs
Li Zhang
1
-1
/
+0
2012-03-18
softmmu templates: optionally pass CPUState to memory access functions
Blue Swirl
1
-0
/
+44
2012-03-14
Rename CPUState -> CPUArchState
Andreas Färber
1
-2
/
+2
2011-11-19
Merge branch 's390-1.0' of git://repo.or.cz/qemu/agraf
Blue Swirl
2
-6
/
+6
2011-11-14
tcg: Use TCGReg for standard tcg-target entry points.
Richard Henderson
1
-4
/
+4
2011-11-14
tcg: Standardize on TCGReg as the enum for hard registers
Richard Henderson
1
-2
/
+2
2011-11-11
tcg-ppc64: Fix compile errors for userspace only builds with gcc 4.6
David Gibson
1
-6
/
+8
2011-10-01
tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h
Stefan Weil
1
-1
/
+0
2011-09-17
tcg/ppc64: Only one call output register needed for 64 bit hosts
Stefan Weil
1
-1
/
+1
2011-09-09
tcg/ppc64: Fix zero extension code generation bug for ppc64 host
Thomas Huth
1
-1
/
+1
2011-08-22
tcg/ppc64: fix 16/32 mixup
malc
1
-2
/
+2
2011-08-22
tcg/ppc64: implement not_i32/64 and ext32u_i64
malc
2
-3
/
+16
2011-08-21
tcg: Always define all of the TCGOpcode enum members.
Richard Henderson
1
-33
/
+35
2011-06-28
TCG/PPC: use stack for TCG temps
Blue Swirl
1
-2
/
+5
2011-06-28
tcg/ppc64: Remove tcg_out_addi
malc
1
-5
/
+0
2011-06-26
Delegate setup of TCG temporaries to targets
Blue Swirl
1
-0
/
+2
2011-06-26
cpu-exec.c: avoid AREG0 use
Blue Swirl
1
-3
/
+3
2010-08-15
TCG: Revert ppc64 tcg_out_movi32 change
Andreas Färber
1
-1
/
+1
2010-06-29
tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.
Richard Henderson
1
-5
/
+4
2010-06-16
tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.
Richard Henderson
1
-0
/
+1
2010-06-09
tcg: Make some tcg-target.c routines static.
Richard Henderson
1
-2
/
+2
2010-06-09
tcg: Add TYPE parameter to tcg_out_mov.
Richard Henderson
1
-5
/
+5
2010-04-07
tcg/ppc64: Fix typo
malc
1
-1
/
+1
2010-04-05
Split TLB addend and target_phys_addr_t
Paul Brook
1
-10
/
+2
2010-03-26
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Richard Henderson
1
-0
/
+2
2010-03-26
tcg: Allow target-specific implementation of NOR.
Richard Henderson
1
-0
/
+2
2010-03-26
tcg: Allow target-specific implementation of NAND.
Richard Henderson
1
-0
/
+2
2010-03-26
tcg: Allow target-specific implementation of EQV.
Richard Henderson
1
-0
/
+2
2010-03-26
tcg: Use TCGCond where appropriate.
Richard Henderson
1
-3
/
+4
2010-03-26
tcg: Name the opcode enumeration.
Richard Henderson
1
-1
/
+1
2010-03-26
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Paolo Bonzini
1
-2
/
+0
2010-03-13
tcg/ppc[64]: Only define addend load helpers in softmmu case
malc
1
-0
/
+2
2010-02-22
tcg/ppc64: Use C90 style comments
malc
1
-18
/
+18
2010-02-20
tcg: Add comments for all optional instructions not implemented.
Richard Henderson
1
-3
/
+22
2010-02-07
tcg/ppc64: implement setcond
malc
1
-0
/
+133
2009-12-15
tcg/ppc64: Fix loading of 32bit constants
malc
1
-1
/
+2
2009-12-06
TCG: Mac OS X support for ppc64 target
Andreas Faerber
1
-14
/
+41
2009-11-24
tcg/ppc64,x86_64: fix constraints of op_qemu_st64
Aurelien Jarno
1
-1
/
+1
2009-07-18
PPC 32/64 GUEST_BASE support
malc
2
-20
/
+62
2009-07-18
Fix LHZX opcode value
malc
1
-1
/
+1
2009-04-11
Remove reserved registers from tcg_target_reg_alloc_order
malc
1
-4
/
+0
2009-04-11
Whack [LS]MW
malc
1
-3
/
+0
2009-03-08
Prune unused TCG_AREGs
blueswir1
1
-1
/
+0
2009-02-11
Add missing r24..r26 to callee save registers
malc
1
-0
/
+5
2008-12-22
Use the ARRAY_SIZE() macro where appropriate.
malc
1
-1
/
+1
2008-12-10
Introduce and use cache-utils.[ch]
malc
1
-21
/
+0
2008-11-12
Avoid compiler warning
malc
1
-1
/
+1
2008-11-11
Fix alignment problem with some 64bit load/store instructions
malc
1
-5
/
+16
2008-10-05
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
blueswir1
1
-0
/
+2
2008-10-02
Optimize 64 bit bswap
malc
1
-5
/
+5
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