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AgeCommit message (Expand)AuthorFilesLines
2011-01-08tcg/mips: fix branch target change during code retranslationAurelien Jarno1-1/+1
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson1-2/+2
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson1-14/+14
2010-04-14tcp/mips: Change TCG_AREG0 (fp -> s0)Stefan Weil2-3/+4
2010-04-05tcg/mips: use seb/seh instructions on MIPS32R2Aurelien Jarno2-8/+41
2010-04-05tcg/mips: fix 64-bit linux-user on big endian MIPSAurelien Jarno1-4/+4
2010-04-05Split TLB addend and target_phys_addr_tPaul Brook1-2/+2
2010-03-29tcg/mips: fix branch offset during retranslationAurelien Jarno1-19/+30
2010-03-27tcg-mips: add guest base supportAurelien Jarno2-29/+39
2010-03-27tcg/mips: implement the not_i32 op the same way as gccAurelien Jarno1-1/+1
2010-03-27tcg-mips: implement norAurelien Jarno2-1/+5
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson1-3/+3
2010-03-26tcg: Allow target-specific implementation of NOR.Richard Henderson1-0/+1
2010-03-26tcg: Allow target-specific implementation of NAND.Richard Henderson1-0/+1
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson1-0/+1
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson1-4/+4
2010-03-26tcg: Name the opcode enumeration.Richard Henderson1-1/+1
2010-03-26remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini1-2/+0
2010-02-20tcg: Add comments for all optional instructions not implemented.Richard Henderson1-1/+3
2010-02-09tcg/mips: fix crash in tcg_out_qemu_ld()Aurelien Jarno1-2/+2
2010-02-09tcg/mips: implement setcond2Aurelien Jarno1-12/+80
2010-02-08tcg/mips: implement setcondAurelien Jarno1-0/+65
2009-12-01tcg: initial mips supportAurelien Jarno2-0/+1446